diff options
| author | Fenghua Yu <fenghua.yu@intel.com> | 2014-02-20 21:24:51 (GMT) |
|---|---|---|
| committer | H. Peter Anvin <hpa@linux.intel.com> | 2014-02-20 21:56:55 (GMT) |
| commit | c2bc11f10a39527cd1bb252097b5525664560956 (patch) | |
| tree | 20b4334ed3842c9c6a96ada9494cf84e260fcdd1 /arch/x86/include/asm/xsave.h | |
| parent | 8e5780fdeef7dc490b3f0b3a62704593721fa4f3 (diff) | |
| download | linux-c2bc11f10a39527cd1bb252097b5525664560956.tar.xz | |
x86, AVX-512: Enable AVX-512 States Context Switch
This patch enables Opmask, ZMM_Hi256, and Hi16_ZMM AVX-512 states for
xstate context switch.
Signed-off-by: Fenghua Yu <fenghua.yu@intel.com>
Link: http://lkml.kernel.org/r/1392931491-33237-2-git-send-email-fenghua.yu@intel.com
Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
Cc: <stable@vger.kernel.org> # hw enabling
Diffstat (limited to 'arch/x86/include/asm/xsave.h')
| -rw-r--r-- | arch/x86/include/asm/xsave.h | 16 |
1 files changed, 10 insertions, 6 deletions
diff --git a/arch/x86/include/asm/xsave.h b/arch/x86/include/asm/xsave.h index 5547389..6c1d741 100644 --- a/arch/x86/include/asm/xsave.h +++ b/arch/x86/include/asm/xsave.h @@ -6,11 +6,14 @@ #define XSTATE_CPUID 0x0000000d -#define XSTATE_FP 0x1 -#define XSTATE_SSE 0x2 -#define XSTATE_YMM 0x4 -#define XSTATE_BNDREGS 0x8 -#define XSTATE_BNDCSR 0x10 +#define XSTATE_FP 0x1 +#define XSTATE_SSE 0x2 +#define XSTATE_YMM 0x4 +#define XSTATE_BNDREGS 0x8 +#define XSTATE_BNDCSR 0x10 +#define XSTATE_OPMASK 0x20 +#define XSTATE_ZMM_Hi256 0x40 +#define XSTATE_Hi16_ZMM 0x80 #define XSTATE_FPSSE (XSTATE_FP | XSTATE_SSE) @@ -23,7 +26,8 @@ #define XSAVE_YMM_OFFSET (XSAVE_HDR_SIZE + XSAVE_HDR_OFFSET) /* Supported features which support lazy state saving */ -#define XSTATE_LAZY (XSTATE_FP | XSTATE_SSE | XSTATE_YMM) +#define XSTATE_LAZY (XSTATE_FP | XSTATE_SSE | XSTATE_YMM \ + | XSTATE_OPMASK | XSTATE_ZMM_Hi256 | XSTATE_Hi16_ZMM) /* Supported features which require eager state saving */ #define XSTATE_EAGER (XSTATE_BNDREGS | XSTATE_BNDCSR) |