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| author | Alexander Graf <agraf@suse.de> | 2013-04-15 08:42:33 (GMT) |
|---|---|---|
| committer | Alexander Graf <agraf@suse.de> | 2013-04-26 18:27:13 (GMT) |
| commit | 8175e5b79c38a1d85225da516fa1a0ecbf2fdbca (patch) | |
| tree | 9fdf768971d7c10292a34b9d15c5f7a1abe1301c /arch/x86/include | |
| parent | c35635efdc0312e013ebda1c8f3b5dd038c0d0e7 (diff) | |
| download | linux-8175e5b79c38a1d85225da516fa1a0ecbf2fdbca.tar.xz | |
KVM: Add KVM_IRQCHIP_NUM_PINS in addition to KVM_IOAPIC_NUM_PINS
The concept of routing interrupt lines to an irqchip is nothing
that is IOAPIC specific. Every irqchip has a maximum number of pins
that can be linked to irq lines.
So let's add a new define that allows us to reuse generic code for
non-IOAPIC platforms.
Signed-off-by: Alexander Graf <agraf@suse.de>
Acked-by: Michael S. Tsirkin <mst@redhat.com>
Diffstat (limited to 'arch/x86/include')
| -rw-r--r-- | arch/x86/include/asm/kvm_host.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/x86/include/asm/kvm_host.h b/arch/x86/include/asm/kvm_host.h index 18635ae..14337fa 100644 --- a/arch/x86/include/asm/kvm_host.h +++ b/arch/x86/include/asm/kvm_host.h @@ -43,6 +43,8 @@ #define KVM_PIO_PAGE_OFFSET 1 #define KVM_COALESCED_MMIO_PAGE_OFFSET 2 +#define KVM_IRQCHIP_NUM_PINS KVM_IOAPIC_NUM_PINS + #define CR0_RESERVED_BITS \ (~(unsigned long)(X86_CR0_PE | X86_CR0_MP | X86_CR0_EM | X86_CR0_TS \ | X86_CR0_ET | X86_CR0_NE | X86_CR0_WP | X86_CR0_AM \ |