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authorJiang Liu <jiang.liu@linux.intel.com>2014-06-09 08:19:39 (GMT)
committerThomas Gleixner <tglx@linutronix.de>2014-06-21 21:05:41 (GMT)
commit3eb2be5f49fdeac5ea2880aec90008f0a8250029 (patch)
tree013c2008477f2b3fa82f3b581d8dc4a1c80085ca /arch/x86/kernel/apic
parent2e0ad0e2c13534f1a0e7f63661e666c281e09b66 (diff)
downloadlinux-3eb2be5f49fdeac5ea2880aec90008f0a8250029.tar.xz
x86, irq, trivial: Minor improvements of IRQ related code
1) Kill unused MAX_HARDIRQS_PER_CPU. 2) Improve function prototype declararions. 3) Simple typo fix, change "gsit" to "gsi". 4) Use macro VECTOR_UNDEFINED instead of hard-coded -1. 5) Kill redundant comments. Signed-off-by: Jiang Liu <jiang.liu@linux.intel.com> Cc: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com> Cc: Tony Luck <tony.luck@intel.com> Cc: Joerg Roedel <joro@8bytes.org> Cc: Paul Gortmaker <paul.gortmaker@windriver.com> Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Cc: Grant Likely <grant.likely@linaro.org> Cc: Rafael J. Wysocki <rjw@rjwysocki.net> Cc: Bjorn Helgaas <bhelgaas@google.com> Cc: Randy Dunlap <rdunlap@infradead.org> Cc: Yinghai Lu <yinghai@kernel.org> Cc: Jiri Kosina <trivial@kernel.org> Link: http://lkml.kernel.org/r/1402302011-23642-11-git-send-email-jiang.liu@linux.intel.com Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Diffstat (limited to 'arch/x86/kernel/apic')
-rw-r--r--arch/x86/kernel/apic/io_apic.c21
1 files changed, 5 insertions, 16 deletions
diff --git a/arch/x86/kernel/apic/io_apic.c b/arch/x86/kernel/apic/io_apic.c
index 81e08ef..f339042 100644
--- a/arch/x86/kernel/apic/io_apic.c
+++ b/arch/x86/kernel/apic/io_apic.c
@@ -1010,7 +1010,7 @@ int IO_APIC_get_PCI_irq_vector(int bus, int slot, int pin,
break;
if (!test_bit(lbus, mp_bus_not_pci) &&
- !mp_irqs[i].irqtype &&
+ mp_irqs[i].irqtype == mp_INT &&
(bus == lbus) &&
(slot == ((mp_irqs[i].srcbusirq >> 2) & 0x1f))) {
int irq = pin_2_irq(i, ioapic_idx, mp_irqs[i].dstirq);
@@ -1359,7 +1359,7 @@ static void __init __io_apic_setup_irqs(unsigned int ioapic_idx)
irq = pin_2_irq(idx, ioapic_idx, pin);
- if ((ioapic_idx > 0) && (irq > 16))
+ if ((ioapic_idx > 0) && (irq > NR_IRQS_LEGACY))
continue;
/*
@@ -1388,7 +1388,7 @@ static void __init setup_IO_APIC_irqs(void)
}
/*
- * for the gsit that is not in first ioapic
+ * for the gsi that is not in first ioapic
* but could not use acpi_register_gsi()
* like some special sci in IBM x3330
*/
@@ -2225,7 +2225,7 @@ asmlinkage __visible void smp_irq_move_cleanup_interrupt(void)
apic->send_IPI_self(IRQ_MOVE_CLEANUP_VECTOR);
goto unlock;
}
- __this_cpu_write(vector_irq[vector], -1);
+ __this_cpu_write(vector_irq[vector], VECTOR_UNDEFINED);
unlock:
raw_spin_unlock(&desc->lock);
}
@@ -2514,17 +2514,6 @@ static inline void init_IO_APIC_traps(void)
struct irq_cfg *cfg;
unsigned int irq;
- /*
- * NOTE! The local APIC isn't very good at handling
- * multiple interrupts at the same interrupt level.
- * As the interrupt level is determined by taking the
- * vector number and shifting that right by 4, we
- * want to spread these out a bit so that they don't
- * all fall in the same interrupt level.
- *
- * Also, we've got to be careful not to trash gate
- * 0x80, because int 0x80 is hm, kind of importantish. ;)
- */
for_each_active_irq(irq) {
cfg = irq_get_chip_data(irq);
if (IO_APIC_IRQ(irq) && cfg && !cfg->vector) {
@@ -3550,7 +3539,7 @@ void __init setup_ioapic_dest(void)
continue;
irq = pin_2_irq(irq_entry, ioapic, pin);
- if ((ioapic > 0) && (irq > 16))
+ if ((ioapic > 0) && (irq > NR_IRQS_LEGACY))
continue;
idata = irq_get_irq_data(irq);