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| author | Andi Kleen <ak@suse.de> | 2008-01-30 12:33:16 (GMT) |
|---|---|---|
| committer | Ingo Molnar <mingo@elte.hu> | 2008-01-30 12:33:16 (GMT) |
| commit | 0c07ee38c9d4eb081758f5ad14bbffa7197e1aec (patch) | |
| tree | f32f5dba9b03b9fa5ac262a2c569b43ae9d0994e /arch/x86/kernel/cpu/amd.c | |
| parent | 30d432dfab2bcfd021d352e2058fae6b9405caeb (diff) | |
| download | linux-0c07ee38c9d4eb081758f5ad14bbffa7197e1aec.tar.xz | |
x86: use the correct cpuid method to detect MWAIT support for C states
Previously there was a AMD specific quirk to handle the case of
AMD Fam10h MWAIT not supporting any C states. But it turns out
that CPUID already has ways to detectly detect that without
using special quirks.
The new code simply checks if MWAIT supports at least C1 and doesn't
use it if it doesn't. No more vendor specific code.
Note this is does not simply clear MWAIT because MWAIT can be still
useful even without C states.
Credit goes to Ben Serebrin for pointing out the (nearly) obvious.
Cc: "Andreas Herrmann" <andreas.herrmann3@amd.com>
Signed-off-by: Andi Kleen <ak@suse.de>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Diffstat (limited to 'arch/x86/kernel/cpu/amd.c')
| -rw-r--r-- | arch/x86/kernel/cpu/amd.c | 3 |
1 files changed, 0 insertions, 3 deletions
diff --git a/arch/x86/kernel/cpu/amd.c b/arch/x86/kernel/cpu/amd.c index cd2fe15..06fa159 100644 --- a/arch/x86/kernel/cpu/amd.c +++ b/arch/x86/kernel/cpu/amd.c @@ -300,9 +300,6 @@ static void __cpuinit init_amd(struct cpuinfo_x86 *c) local_apic_timer_disabled = 1; #endif - if (c->x86 == 0x10 && !force_mwait) - clear_bit(X86_FEATURE_MWAIT, c->x86_capability); - /* K6s reports MCEs but don't actually have all the MSRs */ if (c->x86 < 6) clear_bit(X86_FEATURE_MCE, c->x86_capability); |