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| author | Ingo Molnar <mingo@kernel.org> | 2015-02-04 08:01:12 (GMT) |
|---|---|---|
| committer | Ingo Molnar <mingo@kernel.org> | 2015-02-04 08:01:12 (GMT) |
| commit | 0967160ad615985c7c35443156ea9aecc60c37b8 (patch) | |
| tree | 658f728aff1be23540180091b718452a6848a6b0 /arch/x86/kernel/cpu/mcheck/p5.c | |
| parent | 2fde4f94e0a9531251e706fa57131b51b0df042e (diff) | |
| parent | b57c0b5175ddbe9b477801f9994a5b330702c1ba (diff) | |
| download | linux-0967160ad615985c7c35443156ea9aecc60c37b8.tar.xz | |
Merge branch 'x86/asm' into perf/x86, to avoid conflicts with upcoming patches
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Diffstat (limited to 'arch/x86/kernel/cpu/mcheck/p5.c')
| -rw-r--r-- | arch/x86/kernel/cpu/mcheck/p5.c | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/arch/x86/kernel/cpu/mcheck/p5.c b/arch/x86/kernel/cpu/mcheck/p5.c index a304298..ec2663a 100644 --- a/arch/x86/kernel/cpu/mcheck/p5.c +++ b/arch/x86/kernel/cpu/mcheck/p5.c @@ -8,6 +8,7 @@ #include <linux/smp.h> #include <asm/processor.h> +#include <asm/traps.h> #include <asm/mce.h> #include <asm/msr.h> @@ -17,8 +18,11 @@ int mce_p5_enabled __read_mostly; /* Machine check handler for Pentium class Intel CPUs: */ static void pentium_machine_check(struct pt_regs *regs, long error_code) { + enum ctx_state prev_state; u32 loaddr, hi, lotype; + prev_state = ist_enter(regs); + rdmsr(MSR_IA32_P5_MC_ADDR, loaddr, hi); rdmsr(MSR_IA32_P5_MC_TYPE, lotype, hi); @@ -33,6 +37,8 @@ static void pentium_machine_check(struct pt_regs *regs, long error_code) } add_taint(TAINT_MACHINE_CHECK, LOCKDEP_NOW_UNRELIABLE); + + ist_exit(regs, prev_state); } /* Set up machine check reporting for processors with Intel style MCE: */ |