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author | Rusty Russell <rusty@rustcorp.com.au> | 2009-03-09 16:06:22 (GMT) |
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committer | Rusty Russell <rusty@rustcorp.com.au> | 2009-03-08 23:36:28 (GMT) |
commit | cbd88c8e6f5cdb8d4b9af01df825305200240382 (patch) | |
tree | 4ec4c5123fab9f08e7a31fe7843ab4f7b9197656 /arch/x86/lguest | |
parent | 7a203f3b089be4410fe065dd9927027eade94557 (diff) | |
download | linux-cbd88c8e6f5cdb8d4b9af01df825305200240382.tar.xz |
lguest: fix crash 'unhandled trap 13 at <native_read_msr_safe>'
Impact: fix lguest boot crash on modern Intel machines
The code in early_init_intel does:
if (c->x86 > 6 || (c->x86 == 6 && c->x86_model >= 0xd)) {
u64 misc_enable;
rdmsrl(MSR_IA32_MISC_ENABLE, misc_enable);
And that rdmsr faults (not allowed from non-0 PL). We can get around
this by mugging the family ID part of the cpuid. 5 seems like a good
number.
Of course, this is a hack (how very lguest!). We could just indicate
that we don't support MSRs, or implement lguest_rdmst.
Reported-by: Patrick McHardy <kaber@trash.net>
Signed-off-by: Rusty Russell <rusty@rustcorp.com.au>
Tested-by: Patrick McHardy <kaber@trash.net>
Diffstat (limited to 'arch/x86/lguest')
-rw-r--r-- | arch/x86/lguest/boot.c | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/arch/x86/lguest/boot.c b/arch/x86/lguest/boot.c index 92f1c6f..ba5c05e 100644 --- a/arch/x86/lguest/boot.c +++ b/arch/x86/lguest/boot.c @@ -343,6 +343,11 @@ static void lguest_cpuid(unsigned int *ax, unsigned int *bx, * flush_tlb_user() for both user and kernel mappings unless * the Page Global Enable (PGE) feature bit is set. */ *dx |= 0x00002000; + /* We also lie, and say we're family id 5. 6 or greater + * leads to a rdmsr in early_init_intel which we can't handle. + * Family ID is returned as bits 8-12 in ax. */ + *ax &= 0xFFFFF0FF; + *ax |= 0x00000500; break; case 0x80000000: /* Futureproof this a little: if they ask how much extended |