diff options
| author | Juergen Gross <jgross@suse.com> | 2014-11-03 13:02:03 (GMT) |
|---|---|---|
| committer | Thomas Gleixner <tglx@linutronix.de> | 2014-11-16 10:04:26 (GMT) |
| commit | bd809af16e3ab1f8d55b3e2928c47c67e2a865d2 (patch) | |
| tree | 8ac5084b758cc1af91737e070d281f041df470c0 /arch/x86/mm/init.c | |
| parent | f5b2831d654167d77da8afbef4d2584897b12d0c (diff) | |
| download | linux-bd809af16e3ab1f8d55b3e2928c47c67e2a865d2.tar.xz | |
x86: Enable PAT to use cache mode translation tables
Update the translation tables from cache mode to pgprot values
according to the PAT settings. This enables changing the cache
attributes of a PAT index in just one place without having to change
at the users side.
With this change it is possible to use the same kernel with different
PAT configurations, e.g. supporting Xen.
Signed-off-by: Juergen Gross <jgross@suse.com>
Reviewed-by: Toshi Kani <toshi.kani@hp.com>
Reviewed-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
Reviewed-by: Thomas Gleixner <tglx@linutronix.de>
Cc: stefan.bader@canonical.com
Cc: xen-devel@lists.xensource.com
Cc: ville.syrjala@linux.intel.com
Cc: david.vrabel@citrix.com
Cc: jbeulich@suse.com
Cc: plagnioj@jcrosoft.com
Cc: tomi.valkeinen@ti.com
Cc: bhelgaas@google.com
Link: http://lkml.kernel.org/r/1415019724-4317-18-git-send-email-jgross@suse.com
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Diffstat (limited to 'arch/x86/mm/init.c')
| -rw-r--r-- | arch/x86/mm/init.c | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/arch/x86/mm/init.c b/arch/x86/mm/init.c index a9776ba..82b41d5 100644 --- a/arch/x86/mm/init.c +++ b/arch/x86/mm/init.c @@ -716,3 +716,11 @@ void __init zone_sizes_init(void) free_area_init_nodes(max_zone_pfns); } +void update_cache_mode_entry(unsigned entry, enum page_cache_mode cache) +{ + /* entry 0 MUST be WB (hardwired to speed up translations) */ + BUG_ON(!entry && cache != _PAGE_CACHE_MODE_WB); + + __cachemode2pte_tbl[cache] = __cm_idx2pte(entry); + __pte2cachemode_tbl[entry] = cache; +} |