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| author | Andi Kleen <ak@linux.intel.com> | 2011-03-16 19:44:33 (GMT) |
|---|---|---|
| committer | Robert Richter <robert.richter@amd.com> | 2011-03-24 17:45:44 (GMT) |
| commit | 914a76ca5eedc9f286a36f61c4eaa95b451ba3e6 (patch) | |
| tree | d55c23e10b7c7959d6e4b1a7aba30369e89a5d72 /arch/x86/oprofile/op_counter.h | |
| parent | ec6b426c4dbb9eef40375c389746cab7e931a584 (diff) | |
| download | linux-914a76ca5eedc9f286a36f61c4eaa95b451ba3e6.tar.xz | |
oprofile, x86: Allow setting EDGE/INV/CMASK for counter events
For some performance events it's useful to set the EDGE and INV
bits and the CMASK mask in the counter control register. The list
of predefined events Intel releases for each CPU has some events which
require these settings to get more "natural" to use higher level events.
oprofile currently doesn't allow this.
This patch adds new extra configuration fields for them, so that
they can be specified in oprofilefs.
An updated oprofile daemon can then make use of this to set them.
v2: Write back masked extra value to variable.
Signed-off-by: Andi Kleen <ak@linux.intel.com>
Signed-off-by: Robert Richter <robert.richter@amd.com>
Diffstat (limited to 'arch/x86/oprofile/op_counter.h')
| -rw-r--r-- | arch/x86/oprofile/op_counter.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/x86/oprofile/op_counter.h b/arch/x86/oprofile/op_counter.h index e28398d..0b7b7b1 100644 --- a/arch/x86/oprofile/op_counter.h +++ b/arch/x86/oprofile/op_counter.h @@ -22,6 +22,7 @@ struct op_counter_config { unsigned long kernel; unsigned long user; unsigned long unit_mask; + unsigned long extra; }; extern struct op_counter_config counter_config[]; |