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author | Thomas Gleixner <tglx@linutronix.de> | 2015-05-19 00:00:55 (GMT) |
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committer | Ingo Molnar <mingo@kernel.org> | 2015-05-27 07:17:40 (GMT) |
commit | 0bac237845e203dd1439cfc571b1baf1b2274b3b (patch) | |
tree | a0ecd39b9deccf55090334a92d8dbe058db60394 /arch/x86 | |
parent | 9e7eaac95af6c1aecaf558b8c7a1757d5f2d2ad7 (diff) | |
download | linux-0bac237845e203dd1439cfc571b1baf1b2274b3b.tar.xz |
perf/x86/intel/cqm: Avoid pointless MSR write
If the usage counter is non-zero there is no point to update the rmid
in the PQR MSR.
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Acked-by: Matt Fleming <matt.fleming@intel.com>
Cc: Kanaka Juvva <kanaka.d.juvva@intel.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Vikas Shivappa <vikas.shivappa@linux.intel.com>
Cc: Will Auld <will.auld@intel.com>
Link: http://lkml.kernel.org/r/20150518235150.080844281@linutronix.de
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Diffstat (limited to 'arch/x86')
-rw-r--r-- | arch/x86/kernel/cpu/perf_event_intel_cqm.c | 8 |
1 files changed, 5 insertions, 3 deletions
diff --git a/arch/x86/kernel/cpu/perf_event_intel_cqm.c b/arch/x86/kernel/cpu/perf_event_intel_cqm.c index 63391f8..2ce69c0 100644 --- a/arch/x86/kernel/cpu/perf_event_intel_cqm.c +++ b/arch/x86/kernel/cpu/perf_event_intel_cqm.c @@ -974,10 +974,12 @@ static void intel_cqm_event_start(struct perf_event *event, int mode) event->hw.cqm_state &= ~PERF_HES_STOPPED; - if (state->cnt++) - WARN_ON_ONCE(state->rmid != rmid); - else + if (state->cnt++) { + if (!WARN_ON_ONCE(state->rmid != rmid)) + return; + } else { WARN_ON_ONCE(state->rmid); + } state->rmid = rmid; /* |