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authorChris Zankel <chris@zankel.net>2015-03-13 00:41:32 (GMT)
committerChris Zankel <chris@zankel.net>2015-03-13 00:41:32 (GMT)
commit0372c1abdd0dc22d92b2c803c097399d7e037f81 (patch)
tree0df967b988f27c6bf9550e633dc8f4e7bba511a2 /arch/xtensa/Kconfig
parent40aad098c2a06b9cccd8ac1ef8407fd1677fe913 (diff)
parent01e84c70fe40c8111f960987bcf7f931842e6d07 (diff)
downloadlinux-0372c1abdd0dc22d92b2c803c097399d7e037f81.tar.xz
Merge tag 'xtensa-for-next-20150304' of git://github.com/jcmvbkbc/linux-xtensa into for_next
Xtensa fixes for 4.0: - make xtfpgs LCD driver functional and configurable. This fixes hardware lockup on KC705/ML605 boot; - wire bpf and execveat syscalls; - provide __NR_sync_file_range2 instead of __NR_sync_file_range, as that's what xtensa uses.
Diffstat (limited to 'arch/xtensa/Kconfig')
-rw-r--r--arch/xtensa/Kconfig30
1 files changed, 30 insertions, 0 deletions
diff --git a/arch/xtensa/Kconfig b/arch/xtensa/Kconfig
index e31d494..87be10e 100644
--- a/arch/xtensa/Kconfig
+++ b/arch/xtensa/Kconfig
@@ -428,6 +428,36 @@ config DEFAULT_MEM_SIZE
If unsure, leave the default value here.
+config XTFPGA_LCD
+ bool "Enable XTFPGA LCD driver"
+ depends on XTENSA_PLATFORM_XTFPGA
+ default n
+ help
+ There's a 2x16 LCD on most of XTFPGA boards, kernel may output
+ progress messages there during bootup/shutdown. It may be useful
+ during board bringup.
+
+ If unsure, say N.
+
+config XTFPGA_LCD_BASE_ADDR
+ hex "XTFPGA LCD base address"
+ depends on XTFPGA_LCD
+ default "0x0d0c0000"
+ help
+ Base address of the LCD controller inside KIO region.
+ Different boards from XTFPGA family have LCD controller at different
+ addresses. Please consult prototyping user guide for your board for
+ the correct address. Wrong address here may lead to hardware lockup.
+
+config XTFPGA_LCD_8BIT_ACCESS
+ bool "Use 8-bit access to XTFPGA LCD"
+ depends on XTFPGA_LCD
+ default n
+ help
+ LCD may be connected with 4- or 8-bit interface, 8-bit access may
+ only be used with 8-bit interface. Please consult prototyping user
+ guide for your board for the correct interface width.
+
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