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| author | Max Filippov <jcmvbkbc@gmail.com> | 2014-01-29 03:42:46 (GMT) |
|---|---|---|
| committer | Max Filippov <jcmvbkbc@gmail.com> | 2014-02-21 17:33:43 (GMT) |
| commit | cdc9af7ccfc26d35ff8a29dded2cc2c096c0fc1e (patch) | |
| tree | d3633387e676dbe736cd7582985c5e0dc4dae735 /arch/xtensa/boot | |
| parent | bda8932d234aeaee870ac666e776a5ba03bb13a4 (diff) | |
| download | linux-cdc9af7ccfc26d35ff8a29dded2cc2c096c0fc1e.tar.xz | |
xtensa: xtfpga: use common clock framework
With this change the board needs to set up single clock object, users of
this clock will get correct frequency automatically.
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Diffstat (limited to 'arch/xtensa/boot')
| -rw-r--r-- | arch/xtensa/boot/dts/xtfpga.dtsi | 11 |
1 files changed, 8 insertions, 3 deletions
diff --git a/arch/xtensa/boot/dts/xtfpga.dtsi b/arch/xtensa/boot/dts/xtfpga.dtsi index 46b4f5e..d5ccbbb 100644 --- a/arch/xtensa/boot/dts/xtfpga.dtsi +++ b/arch/xtensa/boot/dts/xtfpga.dtsi @@ -35,6 +35,13 @@ interrupt-controller; }; + clocks { + osc: main-oscillator { + #clock-cells = <0>; + compatible = "fixed-clock"; + }; + }; + serial0: serial@fd050020 { device_type = "serial"; compatible = "ns16550a"; @@ -42,9 +49,7 @@ reg = <0xfd050020 0x20>; reg-shift = <2>; interrupts = <0 1>; /* external irq 0 */ - /* Filled in by platform_setup from FPGA register - * clock-frequency = <100000000>; - */ + clocks = <&osc>; }; enet0: ethoc@fd030000 { |