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author | Chris Zankel <chris@zankel.net> | 2014-11-10 08:24:48 (GMT) |
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committer | Chris Zankel <chris@zankel.net> | 2014-11-10 08:24:48 (GMT) |
commit | c0d7aa07504a8f4abd7b02b9144c4a92b7565f45 (patch) | |
tree | a983f40010592c96e43def4f1293392bb3c99f2d /arch/xtensa/include | |
parent | aeb589734251aaf4c28d80d0efb5da01dc0ce868 (diff) | |
parent | 4006e565e1500db40b8546dcc6011737bc5d986c (diff) | |
download | linux-c0d7aa07504a8f4abd7b02b9144c4a92b7565f45.tar.xz |
Merge tag 'xtensa-for-next-20141021-2' of git://github.com/jcmvbkbc/linux-xtensa into for_next
Xtensa improvements for 3.18:
- fix nommu support;
- remove s6000 variant and s6105 platform.
Diffstat (limited to 'arch/xtensa/include')
-rw-r--r-- | arch/xtensa/include/asm/cacheflush.h | 7 | ||||
-rw-r--r-- | arch/xtensa/include/asm/initialize_mmu.h | 40 | ||||
-rw-r--r-- | arch/xtensa/include/asm/mmu_context.h | 4 | ||||
-rw-r--r-- | arch/xtensa/include/asm/nommu_context.h | 4 | ||||
-rw-r--r-- | arch/xtensa/include/asm/page.h | 12 | ||||
-rw-r--r-- | arch/xtensa/include/asm/pgtable.h | 1 | ||||
-rw-r--r-- | arch/xtensa/include/asm/vectors.h | 7 | ||||
-rw-r--r-- | arch/xtensa/include/uapi/asm/mman.h | 6 |
8 files changed, 62 insertions, 19 deletions
diff --git a/arch/xtensa/include/asm/cacheflush.h b/arch/xtensa/include/asm/cacheflush.h index e72aaca..5f67ace 100644 --- a/arch/xtensa/include/asm/cacheflush.h +++ b/arch/xtensa/include/asm/cacheflush.h @@ -67,6 +67,8 @@ extern void __invalidate_dcache_page_alias(unsigned long, unsigned long); #else static inline void __flush_invalidate_dcache_page_alias(unsigned long virt, unsigned long phys) { } +static inline void __invalidate_dcache_page_alias(unsigned long virt, + unsigned long phys) { } #endif #if defined(CONFIG_MMU) && (ICACHE_WAY_SIZE > PAGE_SIZE) extern void __invalidate_icache_page_alias(unsigned long, unsigned long); @@ -84,7 +86,8 @@ static inline void __invalidate_icache_page_alias(unsigned long virt, * (see also Documentation/cachetlb.txt) */ -#if (DCACHE_WAY_SIZE > PAGE_SIZE) || defined(CONFIG_SMP) +#if defined(CONFIG_MMU) && \ + ((DCACHE_WAY_SIZE > PAGE_SIZE) || defined(CONFIG_SMP)) #ifdef CONFIG_SMP void flush_cache_all(void); @@ -150,7 +153,7 @@ void local_flush_cache_page(struct vm_area_struct *vma, #define flush_dcache_mmap_lock(mapping) do { } while (0) #define flush_dcache_mmap_unlock(mapping) do { } while (0) -#if (DCACHE_WAY_SIZE > PAGE_SIZE) +#if defined(CONFIG_MMU) && (DCACHE_WAY_SIZE > PAGE_SIZE) extern void copy_to_user_page(struct vm_area_struct*, struct page*, unsigned long, void*, const void*, unsigned long); diff --git a/arch/xtensa/include/asm/initialize_mmu.h b/arch/xtensa/include/asm/initialize_mmu.h index 600781e..e256f22 100644 --- a/arch/xtensa/include/asm/initialize_mmu.h +++ b/arch/xtensa/include/asm/initialize_mmu.h @@ -26,8 +26,16 @@ #include <asm/pgtable.h> #include <asm/vectors.h> +#if XCHAL_HAVE_PTP_MMU #define CA_BYPASS (_PAGE_CA_BYPASS | _PAGE_HW_WRITE | _PAGE_HW_EXEC) #define CA_WRITEBACK (_PAGE_CA_WB | _PAGE_HW_WRITE | _PAGE_HW_EXEC) +#else +#define CA_WRITEBACK (0x4) +#endif + +#ifndef XCHAL_SPANNING_WAY +#define XCHAL_SPANNING_WAY 0 +#endif #ifdef __ASSEMBLY__ @@ -75,7 +83,7 @@ /* Step 1: invalidate mapping at 0x40000000..0x5FFFFFFF. */ - movi a2, 0x40000006 + movi a2, 0x40000000 | XCHAL_SPANNING_WAY idtlb a2 iitlb a2 isync @@ -141,9 +149,6 @@ jx a4 1: - movi a2, VECBASE_RESET_VADDR - wsr a2, vecbase - /* Step 5: remove temporary mapping. */ idtlb a7 iitlb a7 @@ -156,6 +161,33 @@ #endif /* defined(CONFIG_MMU) && XCHAL_HAVE_PTP_MMU && XCHAL_HAVE_SPANNING_WAY */ +#if !defined(CONFIG_MMU) && XCHAL_HAVE_TLBS + /* Enable data and instruction cache in the DEFAULT_MEMORY region + * if the processor has DTLB and ITLB. + */ + + movi a5, PLATFORM_DEFAULT_MEM_START | XCHAL_SPANNING_WAY + movi a6, ~_PAGE_ATTRIB_MASK + movi a7, CA_WRITEBACK + movi a8, 0x20000000 + movi a9, PLATFORM_DEFAULT_MEM_SIZE + j 2f +1: + sub a9, a9, a8 +2: + rdtlb1 a3, a5 + ritlb1 a4, a5 + and a3, a3, a6 + and a4, a4, a6 + or a3, a3, a7 + or a4, a4, a7 + wdtlb a3, a5 + witlb a4, a5 + add a5, a5, a8 + bltu a8, a9, 1b + +#endif + .endm #endif /*__ASSEMBLY__*/ diff --git a/arch/xtensa/include/asm/mmu_context.h b/arch/xtensa/include/asm/mmu_context.h index d33c71a..04c8ebd 100644 --- a/arch/xtensa/include/asm/mmu_context.h +++ b/arch/xtensa/include/asm/mmu_context.h @@ -50,11 +50,7 @@ DECLARE_PER_CPU(unsigned long, asid_cache); #define ASID_MASK ((1 << XCHAL_MMU_ASID_BITS) - 1) #define ASID_INSERT(x) (0x03020001 | (((x) & ASID_MASK) << 8)) -#ifdef CONFIG_MMU void init_mmu(void); -#else -static inline void init_mmu(void) { } -#endif static inline void set_rasid_register (unsigned long val) { diff --git a/arch/xtensa/include/asm/nommu_context.h b/arch/xtensa/include/asm/nommu_context.h index 3407cf7..22984fd 100644 --- a/arch/xtensa/include/asm/nommu_context.h +++ b/arch/xtensa/include/asm/nommu_context.h @@ -1,3 +1,7 @@ +static inline void init_mmu(void) +{ +} + static inline void enter_lazy_tlb(struct mm_struct *mm, struct task_struct *tsk) { } diff --git a/arch/xtensa/include/asm/page.h b/arch/xtensa/include/asm/page.h index abe24c6..ad38500 100644 --- a/arch/xtensa/include/asm/page.h +++ b/arch/xtensa/include/asm/page.h @@ -20,10 +20,10 @@ * Fixed TLB translations in the processor. */ -#define XCHAL_KSEG_CACHED_VADDR 0xd0000000 -#define XCHAL_KSEG_BYPASS_VADDR 0xd8000000 -#define XCHAL_KSEG_PADDR 0x00000000 -#define XCHAL_KSEG_SIZE 0x08000000 +#define XCHAL_KSEG_CACHED_VADDR __XTENSA_UL_CONST(0xd0000000) +#define XCHAL_KSEG_BYPASS_VADDR __XTENSA_UL_CONST(0xd8000000) +#define XCHAL_KSEG_PADDR __XTENSA_UL_CONST(0x00000000) +#define XCHAL_KSEG_SIZE __XTENSA_UL_CONST(0x08000000) /* * PAGE_SHIFT determines the page size @@ -37,7 +37,7 @@ #define PAGE_OFFSET XCHAL_KSEG_CACHED_VADDR #define MAX_MEM_PFN XCHAL_KSEG_SIZE #else -#define PAGE_OFFSET 0 +#define PAGE_OFFSET __XTENSA_UL_CONST(0) #define MAX_MEM_PFN (PLATFORM_DEFAULT_MEM_START + PLATFORM_DEFAULT_MEM_SIZE) #endif @@ -145,7 +145,7 @@ extern void copy_page(void *to, void *from); * some extra work */ -#if DCACHE_WAY_SIZE > PAGE_SIZE +#if defined(CONFIG_MMU) && DCACHE_WAY_SIZE > PAGE_SIZE extern void clear_page_alias(void *vaddr, unsigned long paddr); extern void copy_page_alias(void *to, void *from, unsigned long to_paddr, unsigned long from_paddr); diff --git a/arch/xtensa/include/asm/pgtable.h b/arch/xtensa/include/asm/pgtable.h index 0383aed..872bf01 100644 --- a/arch/xtensa/include/asm/pgtable.h +++ b/arch/xtensa/include/asm/pgtable.h @@ -178,6 +178,7 @@ #else /* no mmu */ +# define _PAGE_CHG_MASK (PAGE_MASK | _PAGE_ACCESSED | _PAGE_DIRTY) # define PAGE_NONE __pgprot(0) # define PAGE_SHARED __pgprot(0) # define PAGE_COPY __pgprot(0) diff --git a/arch/xtensa/include/asm/vectors.h b/arch/xtensa/include/asm/vectors.h index f74ddfb..a46c53f 100644 --- a/arch/xtensa/include/asm/vectors.h +++ b/arch/xtensa/include/asm/vectors.h @@ -19,6 +19,7 @@ #define _XTENSA_VECTORS_H #include <variant/core.h> +#include <platform/hardware.h> #define XCHAL_KIO_CACHED_VADDR 0xe0000000 #define XCHAL_KIO_BYPASS_VADDR 0xf0000000 @@ -51,13 +52,13 @@ /* MMU Not being used - Virtual == Physical */ /* VECBASE */ - #define VIRTUAL_MEMORY_ADDRESS 0x00002000 + #define VIRTUAL_MEMORY_ADDRESS (PLATFORM_DEFAULT_MEM_START + 0x2000) /* Location of the start of the kernel text, _start */ - #define KERNELOFFSET 0x00003000 + #define KERNELOFFSET (PLATFORM_DEFAULT_MEM_START + 0x3000) /* Loaded just above possibly live vectors */ - #define LOAD_MEMORY_ADDRESS 0x00003000 + #define LOAD_MEMORY_ADDRESS (PLATFORM_DEFAULT_MEM_START + 0x3000) #endif /* CONFIG_MMU */ diff --git a/arch/xtensa/include/uapi/asm/mman.h b/arch/xtensa/include/uapi/asm/mman.h index 00eed67..201aec0 100644 --- a/arch/xtensa/include/uapi/asm/mman.h +++ b/arch/xtensa/include/uapi/asm/mman.h @@ -55,6 +55,12 @@ #define MAP_NONBLOCK 0x20000 /* do not block on IO */ #define MAP_STACK 0x40000 /* give out an address that is best suited for process/thread stacks */ #define MAP_HUGETLB 0x80000 /* create a huge page mapping */ +#ifdef CONFIG_MMAP_ALLOW_UNINITIALIZED +# define MAP_UNINITIALIZED 0x4000000 /* For anonymous mmap, memory could be + * uninitialized */ +#else +# define MAP_UNINITIALIZED 0x0 /* Don't support this flag */ +#endif /* * Flags for msync |