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authorArnd Bergmann <arnd@arndb.de>2016-04-25 20:47:43 (GMT)
committerArnd Bergmann <arnd@arndb.de>2016-04-25 20:47:43 (GMT)
commit318085c748d46888415ceb20f9c64d9e1b58c3c7 (patch)
tree09fb4e1e9716b814df8a4815982ad0532a650de0 /arch
parente24f89e37bee8a11050ce87293814e2c86e3b330 (diff)
parentafa05e55a047f8aa7c865dde5353d96d136aeab2 (diff)
downloadlinux-318085c748d46888415ceb20f9c64d9e1b58c3c7.tar.xz
Merge tag 'samsung-dt64-4.7' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into next/dt64
Merge "Samsung Device Tree ARM64 updates and improvements for v4.7" from Krzysztof Kozlowski: 1. Add PL330 DMA controller and Thermal Management Unit to Exynos 7. * tag 'samsung-dt64-4.7' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux: arm64: dts: Add nodes for pdma0 and pdma1 for exynos7 arm64: dts: exynos: Add TMU node for exynos7
Diffstat (limited to 'arch')
-rw-r--r--arch/arm64/boot/dts/exynos/exynos7-tmu-sensor-conf.dtsi25
-rw-r--r--arch/arm64/boot/dts/exynos/exynos7-trip-points.dtsi54
-rw-r--r--arch/arm64/boot/dts/exynos/exynos7.dtsi49
3 files changed, 128 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/exynos/exynos7-tmu-sensor-conf.dtsi b/arch/arm64/boot/dts/exynos/exynos7-tmu-sensor-conf.dtsi
new file mode 100644
index 0000000..1d6dcf2
--- /dev/null
+++ b/arch/arm64/boot/dts/exynos/exynos7-tmu-sensor-conf.dtsi
@@ -0,0 +1,25 @@
+/*
+ * Device tree sources for Exynos7 TMU sensor configuration
+ *
+ * Copyright (c) 2016 Samsung Electronics Co., Ltd.
+ * http://www.samsung.com
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ */
+
+#include <dt-bindings/thermal/thermal_exynos.h>
+
+#thermal-sensor-cells = <0>;
+samsung,tmu_gain = <9>;
+samsung,tmu_reference_voltage = <17>;
+samsung,tmu_noise_cancel_mode = <4>;
+samsung,tmu_efuse_value = <75>;
+samsung,tmu_min_efuse_value = <15>;
+samsung,tmu_max_efuse_value = <100>;
+samsung,tmu_first_point_trim = <25>;
+samsung,tmu_second_point_trim = <85>;
+samsung,tmu_default_temp_offset = <50>;
+samsung,tmu_cal_type = <TYPE_ONE_POINT_TRIMMING>;
diff --git a/arch/arm64/boot/dts/exynos/exynos7-trip-points.dtsi b/arch/arm64/boot/dts/exynos/exynos7-trip-points.dtsi
new file mode 100644
index 0000000..0623583
--- /dev/null
+++ b/arch/arm64/boot/dts/exynos/exynos7-trip-points.dtsi
@@ -0,0 +1,54 @@
+/*
+ * Device tree sources for default Exynos7 thermal zone definition
+ *
+ * Copyright (c) 2016 Samsung Electronics Co., Ltd.
+ * http://www.samsung.com
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ */
+
+trips {
+ cpu-alert-0 {
+ temperature = <75000>; /* millicelsius */
+ hysteresis = <10000>; /* millicelsius */
+ type = "passive";
+ };
+ cpu-alert-1 {
+ temperature = <80000>; /* millicelsius */
+ hysteresis = <10000>; /* millicelsius */
+ type = "passive";
+ };
+ cpu-alert-2 {
+ temperature = <85000>; /* millicelsius */
+ hysteresis = <10000>; /* millicelsius */
+ type = "passive";
+ };
+ cpu-alert-3 {
+ temperature = <90000>; /* millicelsius */
+ hysteresis = <10000>; /* millicelsius */
+ type = "passive";
+ };
+ cpu-alert-4 {
+ temperature = <95000>; /* millicelsius */
+ hysteresis = <10000>; /* millicelsius */
+ type = "passive";
+ };
+ cpu-alert-5 {
+ temperature = <100000>; /* millicelsius */
+ hysteresis = <10000>; /* millicelsius */
+ type = "passive";
+ };
+ cpu-alert-6 {
+ temperature = <110000>; /* millicelsius */
+ hysteresis = <10000>; /* millicelsius */
+ type = "passive";
+ };
+ cpu-crit-0 {
+ temperature = <115000>; /* millicelsius */
+ hysteresis = <0>; /* millicelsius */
+ type = "critical";
+ };
+};
diff --git a/arch/arm64/boot/dts/exynos/exynos7.dtsi b/arch/arm64/boot/dts/exynos/exynos7.dtsi
index 93108f1..ca663df 100644
--- a/arch/arm64/boot/dts/exynos/exynos7.dtsi
+++ b/arch/arm64/boot/dts/exynos/exynos7.dtsi
@@ -27,6 +27,7 @@
pinctrl6 = &pinctrl_fsys0;
pinctrl7 = &pinctrl_fsys1;
pinctrl8 = &pinctrl_bus1;
+ tmuctrl0 = &tmuctrl_0;
};
cpus {
@@ -95,6 +96,35 @@
<0x11006000 0x2000>;
};
+ amba {
+ compatible = "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+
+ pdma0: pdma@10E10000 {
+ compatible = "arm,pl330", "arm,primecell";
+ reg = <0x10E10000 0x1000>;
+ interrupts = <0 225 0>;
+ clocks = <&clock_fsys0 ACLK_PDMA0>;
+ clock-names = "apb_pclk";
+ #dma-cells = <1>;
+ #dma-channels = <8>;
+ #dma-requests = <32>;
+ };
+
+ pdma1: pdma@10EB0000 {
+ compatible = "arm,pl330", "arm,primecell";
+ reg = <0x10EB0000 0x1000>;
+ interrupts = <0 226 0>;
+ clocks = <&clock_fsys0 ACLK_PDMA1>;
+ clock-names = "apb_pclk";
+ #dma-cells = <1>;
+ #dma-channels = <8>;
+ #dma-requests = <32>;
+ };
+ };
+
clock_topc: clock-controller@10570000 {
compatible = "samsung,exynos7-clock-topc";
reg = <0x10570000 0x10000>;
@@ -538,6 +568,25 @@
clocks = <&clock_peric0 PCLK_PWM>;
clock-names = "timers";
};
+
+ tmuctrl_0: tmu@10060000 {
+ compatible = "samsung,exynos7-tmu";
+ reg = <0x10060000 0x200>;
+ interrupts = <0 108 0>;
+ clocks = <&clock_peris PCLK_TMU>,
+ <&clock_peris SCLK_TMU>;
+ clock-names = "tmu_apbif", "tmu_sclk";
+ #include "exynos7-tmu-sensor-conf.dtsi"
+ };
+
+ thermal-zones {
+ atlas_thermal: cluster0-thermal {
+ polling-delay-passive = <0>; /* milliseconds */
+ polling-delay = <0>; /* milliseconds */
+ thermal-sensors = <&tmuctrl_0>;
+ #include "exynos7-trip-points.dtsi"
+ };
+ };
};
};