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authorAlison Wang <b18965@freescale.com>2017-05-17 05:12:15 (GMT)
committerXie Xiaobo <xiaobo.xie@nxp.com>2017-07-14 09:57:25 (GMT)
commit3859c6e954000cdbfd3bbd75603da098103a51ee (patch)
tree432bf3687a6bd0c56bdec6103e03dcec7b724ee9 /arch
parentc062214158feefbcf58a6bca03eee1c8dc37155d (diff)
downloadlinux-3859c6e954000cdbfd3bbd75603da098103a51ee.tar.xz
dts: ls1021a: Add the DTS for QSPI support
This patch adds dts nodes for QSPI on LS1021A. Signed-off-by: Yuan Yao <yao.yuan@nxp.com> Signed-off-by: Alison Wang <alison.wang@nxp.com>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/boot/dts/ls1021a-qds.dts13
-rw-r--r--arch/arm/boot/dts/ls1021a-twr.dts14
-rw-r--r--arch/arm/boot/dts/ls1021a.dtsi15
3 files changed, 42 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/ls1021a-qds.dts b/arch/arm/boot/dts/ls1021a-qds.dts
index 9408753..5611a9c 100644
--- a/arch/arm/boot/dts/ls1021a-qds.dts
+++ b/arch/arm/boot/dts/ls1021a-qds.dts
@@ -124,6 +124,19 @@
};
};
+&qspi {
+ num-cs = <2>;
+ status = "okay";
+
+ qflash0: s25fl128s@0 {
+ compatible = "spansion,m25p80";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ spi-max-frequency = <20000000>;
+ reg = <0>;
+ };
+};
+
&enet0 {
tbi-handle = <&tbi0>;
phy-handle = <&sgmii_phy1c>;
diff --git a/arch/arm/boot/dts/ls1021a-twr.dts b/arch/arm/boot/dts/ls1021a-twr.dts
index a8b148a..e800894 100644
--- a/arch/arm/boot/dts/ls1021a-twr.dts
+++ b/arch/arm/boot/dts/ls1021a-twr.dts
@@ -142,6 +142,20 @@
};
};
+&qspi {
+ num-cs = <2>;
+ status = "okay";
+
+ qflash0: n25q128a13@0 {
+ compatible = "n25q128a13", "jedec,spi-nor";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ m25p,fast-read;
+ spi-max-frequency = <20000000>;
+ reg = <0>;
+ };
+};
+
&enet0 {
tbi-handle = <&tbi1>;
phy-handle = <&sgmii_phy2>;
diff --git a/arch/arm/boot/dts/ls1021a.dtsi b/arch/arm/boot/dts/ls1021a.dtsi
index 8c02da1..63ef268 100644
--- a/arch/arm/boot/dts/ls1021a.dtsi
+++ b/arch/arm/boot/dts/ls1021a.dtsi
@@ -277,6 +277,21 @@
status = "disabled";
};
+ qspi: quadspi@1550000 {
+ compatible = "fsl,ls1021a-qspi";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x0 0x1550000 0x0 0x10000>,
+ <0x0 0x40000000 0x0 0x4000000>;
+ reg-names = "QuadSPI", "QuadSPI-memory";
+ interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>;
+ clock-names = "qspi_en", "qspi";
+ clocks = <&platform_clk 1>, <&platform_clk 1>;
+ big-endian;
+ amba-base = <0x40000000>;
+ status = "disabled";
+ };
+
i2c0: i2c@2180000 {
compatible = "fsl,vf610-i2c";
#address-cells = <1>;