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authorAnup Patel <anup.patel@broadcom.com>2016-03-29 07:27:31 (GMT)
committerFlorian Fainelli <f.fainelli@gmail.com>2016-04-13 17:34:28 (GMT)
commit538fb37c1304c0edc14ad19a6b0311d840314c2a (patch)
treefb22bb0fa330d1dab7271765becbdc97bf31383a /arch
parentf55532a0c0b8bb6148f4e07853b876ef73bc69ca (diff)
downloadlinux-538fb37c1304c0edc14ad19a6b0311d840314c2a.tar.xz
arm64: dts: Add ARM PL330 DMA DT node for NS2
We have one ARM PL330 DMA instance with 8 channels in NS2 SoC. Let's enable it for NS2 in NS2 DT. Signed-off-by: Anup Patel <anup.patel@broadcom.com> Reviewed-by: Ray Jui <rjui@broadcom.com> Reviewed-by: Pramod KUMAR <pramodku@broadcom.com> Reviewed-by: Scott Branden <sbranden@broadcom.com> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm64/boot/dts/broadcom/ns2.dtsi19
1 files changed, 19 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/broadcom/ns2.dtsi b/arch/arm64/boot/dts/broadcom/ns2.dtsi
index 6f81c9d..a9f4585 100644
--- a/arch/arm64/boot/dts/broadcom/ns2.dtsi
+++ b/arch/arm64/boot/dts/broadcom/ns2.dtsi
@@ -217,6 +217,25 @@
#size-cells = <1>;
ranges = <0 0 0 0xffffffff>;
+ dma0: dma@61360000 {
+ compatible = "arm,pl330", "arm,primecell";
+ reg = <0x61360000 0x1000>;
+ interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>;
+ #dma-cells = <1>;
+ #dma-channels = <8>;
+ #dma-requests = <32>;
+ clocks = <&iprocslow>;
+ clock-names = "apb_pclk";
+ };
+
smmu: mmu@64000000 {
compatible = "arm,mmu-500";
reg = <0x64000000 0x40000>;