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authorGabriel Fernandez <gabriel.fernandez@linaro.org>2015-10-07 09:08:00 (GMT)
committerMaxime Coquelin <maxime.coquelin@st.com>2015-10-15 11:48:16 (GMT)
commit848dd6a87a10bd24b5a4c8b84eaba3cdd0ec7a19 (patch)
treedfbf8dfdd9bd379e6079000b676d059f5115a7bd /arch
parent69e7c854c7d4ea30c4e17cfa890946e16c5a36f0 (diff)
downloadlinux-848dd6a87a10bd24b5a4c8b84eaba3cdd0ec7a19.tar.xz
ARM: STi: DT: Add support for stih418 A9 pll
Add support for new PLL-type for stih418 A9-PLL. Signed-off-by: Gabriel Fernandez <gabriel.fernandez@linaro.org> Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/boot/dts/stih418-clock.dtsi2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/boot/dts/stih418-clock.dtsi b/arch/arm/boot/dts/stih418-clock.dtsi
index 148e177..ae6d997 100644
--- a/arch/arm/boot/dts/stih418-clock.dtsi
+++ b/arch/arm/boot/dts/stih418-clock.dtsi
@@ -44,7 +44,7 @@
clockgen_a9_pll: clockgen-a9-pll {
#clock-cells = <1>;
- compatible = "st,stih407-plls-c32-a9", "st,clkgen-plls-c32";
+ compatible = "st,stih418-plls-c28-a9", "st,clkgen-plls-c32";
clocks = <&clk_sysin>;