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authorHaiying Wang <Haiying.wang@freescale.com>2015-08-08 11:25:02 (GMT)
committerXie Xiaobo <xiaobo.xie@nxp.com>2017-07-14 10:09:10 (GMT)
commit1db43fbb418820912b41bc2105a6d9ad87438421 (patch)
tree9c553a663c0675df9950ed4158d8a2d7a930ab2d /arch
parentad8b9740a53990da8059c1f67ff241ec609a97a8 (diff)
downloadlinux-1db43fbb418820912b41bc2105a6d9ad87438421.tar.xz
arm64/pgtable: add support to map cacheable and non shareable memory
Signed-off-by: Haiying Wang <Haiying.wang@freescale.com> Signed-off-by: Stuart Yoder <stuart.yoder@nxp.com>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm64/include/asm/pgtable.h5
1 files changed, 5 insertions, 0 deletions
diff --git a/arch/arm64/include/asm/pgtable.h b/arch/arm64/include/asm/pgtable.h
index 61e2140..b8c876f 100644
--- a/arch/arm64/include/asm/pgtable.h
+++ b/arch/arm64/include/asm/pgtable.h
@@ -356,6 +356,11 @@ static inline int pmd_protnone(pmd_t pmd)
__pgprot_modify(prot, PTE_ATTRINDX_MASK, PTE_ATTRINDX(MT_DEVICE_nGnRnE) | PTE_PXN | PTE_UXN)
#define pgprot_writecombine(prot) \
__pgprot_modify(prot, PTE_ATTRINDX_MASK, PTE_ATTRINDX(MT_NORMAL_NC) | PTE_PXN | PTE_UXN)
+#define pgprot_cached(prot) \
+ __pgprot_modify(prot, PTE_ATTRINDX_MASK, PTE_ATTRINDX(MT_NORMAL) | \
+ PTE_PXN | PTE_UXN)
+#define pgprot_cached_ns(prot) \
+ __pgprot(pgprot_val(pgprot_cached(prot)) ^ PTE_SHARED)
#define pgprot_device(prot) \
__pgprot_modify(prot, PTE_ATTRINDX_MASK, PTE_ATTRINDX(MT_DEVICE_nGnRE) | PTE_PXN | PTE_UXN)
#define __HAVE_PHYS_MEM_ACCESS_PROT