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author | Minghuan Lian <Minghuan.Lian@nxp.com> | 2017-01-17 06:38:32 (GMT) |
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committer | Xie Xiaobo <xiaobo.xie@nxp.com> | 2017-07-14 09:57:23 (GMT) |
commit | 3dbf462cc9531a0c9fc04e6a02175f1d7a41be24 (patch) | |
tree | d06eac1de5c502911368e33dcdec58b38d2725ca /arch | |
parent | e4fa4b5955eca17e32506f8367bee3c0c45dfd29 (diff) | |
download | linux-3dbf462cc9531a0c9fc04e6a02175f1d7a41be24.tar.xz |
arm: dts: ls1021a: share all MSIs
In order to maximize the use of MSI, a PCIe controller will share
all MSI controllers. The patch changes msi-parent to refer to all
MSI controller dts nodes.
Signed-off-by: Minghuan Lian <Minghuan.Lian@nxp.com>
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Diffstat (limited to 'arch')
-rw-r--r-- | arch/arm/boot/dts/ls1021a.dtsi | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/arm/boot/dts/ls1021a.dtsi b/arch/arm/boot/dts/ls1021a.dtsi index ae08b16..36a5f70 100644 --- a/arch/arm/boot/dts/ls1021a.dtsi +++ b/arch/arm/boot/dts/ls1021a.dtsi @@ -643,7 +643,7 @@ bus-range = <0x0 0xff>; ranges = <0x81000000 0x0 0x00000000 0x40 0x00010000 0x0 0x00010000 /* downstream I/O */ 0x82000000 0x0 0x40000000 0x40 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */ - msi-parent = <&msi1>; + msi-parent = <&msi1>, <&msi2>; #interrupt-cells = <1>; interrupt-map-mask = <0 0 0 7>; interrupt-map = <0000 0 0 1 &gic GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>, @@ -666,7 +666,7 @@ bus-range = <0x0 0xff>; ranges = <0x81000000 0x0 0x00000000 0x48 0x00010000 0x0 0x00010000 /* downstream I/O */ 0x82000000 0x0 0x40000000 0x48 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */ - msi-parent = <&msi2>; + msi-parent = <&msi1>, <&msi2>; #interrupt-cells = <1>; interrupt-map-mask = <0 0 0 7>; interrupt-map = <0000 0 0 1 &gic GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>, |