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| author | Leonid Yegoshin <Leonid.Yegoshin@imgtec.com> | 2014-11-18 16:24:15 (GMT) |
|---|---|---|
| committer | Markos Chandras <markos.chandras@imgtec.com> | 2015-02-16 10:01:25 (GMT) |
| commit | 51eec48e1252ea39d21b5206e4962f09f823a369 (patch) | |
| tree | 52b61709dd45d40c3980c3a8215aac915f05ac7e /arch | |
| parent | 7fd08ca58ae6299e7f7efee9b9062b731de94726 (diff) | |
| download | linux-51eec48e1252ea39d21b5206e4962f09f823a369.tar.xz | |
MIPS: mm: uasm: Add signed 9-bit immediate related macros
MIPS R6 redefines several instructions and reduces the immediate
field to 9-bits so add related macros for the microassembler.
Signed-off-by: Leonid Yegoshin <Leonid.Yegoshin@imgtec.com>
Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/mips/mm/uasm.c | 13 |
1 files changed, 12 insertions, 1 deletions
diff --git a/arch/mips/mm/uasm.c b/arch/mips/mm/uasm.c index 4adf302..f86d293 100644 --- a/arch/mips/mm/uasm.c +++ b/arch/mips/mm/uasm.c @@ -24,7 +24,8 @@ enum fields { JIMM = 0x080, FUNC = 0x100, SET = 0x200, - SCIMM = 0x400 + SCIMM = 0x400, + SIMM9 = 0x800, }; #define OP_MASK 0x3f @@ -41,6 +42,8 @@ enum fields { #define FUNC_SH 0 #define SET_MASK 0x7 #define SET_SH 0 +#define SIMM9_SH 7 +#define SIMM9_MASK 0x1ff enum opcode { insn_invalid, @@ -116,6 +119,14 @@ static inline u32 build_scimm(u32 arg) return (arg & SCIMM_MASK) << SCIMM_SH; } +static inline u32 build_scimm9(s32 arg) +{ + WARN((arg > 0xff || arg < -0x100), + KERN_WARNING "Micro-assembler field overflow\n"); + + return (arg & SIMM9_MASK) << SIMM9_SH; +} + static inline u32 build_func(u32 arg) { WARN(arg & ~FUNC_MASK, KERN_WARNING "Micro-assembler field overflow\n"); |