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| author | Anssi Hannula <anssi.hannula@bitwise.fi> | 2017-02-13 11:46:41 (GMT) |
|---|---|---|
| committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2017-02-23 16:44:35 (GMT) |
| commit | ef746a305de321a117723e664d57f7f4c2e2ac99 (patch) | |
| tree | 52874f73b318827bae8dd42ff4907cfd974cfe7d /arch | |
| parent | 80a0477665d050e6e8aed0519f62a691a573fd07 (diff) | |
| download | linux-ef746a305de321a117723e664d57f7f4c2e2ac99.tar.xz | |
mmc: core: fix multi-bit bus width without high-speed mode
commit 3d4ef329757cfd5e0b23cce97cdeca7e2df89c99 upstream.
Commit 577fb13199b1 ("mmc: rework selection of bus speed mode")
refactored bus width selection code to mmc_select_bus_width().
However, it also altered the behavior to not call the selection code in
non-high-speed modes anymore.
This causes 1-bit mode to always be used when the high-speed mode is not
enabled, even though 4-bit and 8-bit bus are valid bus widths in the
backwards-compatibility (legacy) mode as well (see e.g. 5.3.2 Bus Speed
Modes in JEDEC 84-B50). This results in a significant regression in
transfer speeds.
Fix the code to allow 4-bit and 8-bit widths even without high-speed
mode, as before.
Tested with a Zynq-7000 PicoZed 7020 board.
Fixes: 577fb13199b1 ("mmc: rework selection of bus speed mode")
Signed-off-by: Anssi Hannula <anssi.hannula@bitwise.fi>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'arch')
0 files changed, 0 insertions, 0 deletions