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authorLey Foon Tan <lftan@altera.com>2015-04-10 03:10:08 (GMT)
committerLey Foon Tan <lftan@altera.com>2015-04-10 03:10:08 (GMT)
commit4a89c3088ff61aa24754e9cd6dc665cc719f7efe (patch)
treed280b9ad4a94a3aeec310e5764760df685c6ffca /block/bsg-lib.c
parente3e29f990cc77c5b23280c77275812a3f010cc41 (diff)
downloadlinux-4a89c3088ff61aa24754e9cd6dc665cc719f7efe.tar.xz
nios2: fix cache coherency issue when debug with gdb
Remove the end address checking for flushda function. We need to flush each address line for flushda instruction, from start to end address. This is because flushda instruction only flush the cache if tag and line fields are matched. Change to use ldwio instruction (bypass cache) to load the instruction that causing trap. Our interest is the actual instruction that executed by the processor, this should be uncached. Note, EA address might be an userspace cached address. Signed-off-by: Ley Foon Tan <lftan@altera.com>
Diffstat (limited to 'block/bsg-lib.c')
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