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| author | Maxime Ripard <maxime.ripard@free-electrons.com> | 2015-09-21 11:32:43 (GMT) |
|---|---|---|
| committer | Maxime Ripard <maxime.ripard@free-electrons.com> | 2015-10-21 19:51:28 (GMT) |
| commit | eb662f854710e6a438789a4b0d1d0cce8c12379d (patch) | |
| tree | 1550ceffb453194a49357c0321b0c6dd56b279ba /certs | |
| parent | 460d0d444822e9032a2573fc051b45c68b89a97a (diff) | |
| download | linux-eb662f854710e6a438789a4b0d1d0cce8c12379d.tar.xz | |
clk: sunxi: pll2: Add A13 support
The A13, unlike the A10 and A20, doesn't use a pass-through exception for
the 0 value in the pre and post dividers, but increments all the values
written in the register by one.
Add an exception for both these cases to handle them nicely.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: Chen-Yu Tsai <wens@csie.org>
Diffstat (limited to 'certs')
0 files changed, 0 insertions, 0 deletions