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| author | Chris Zankel <chris@zankel.net> | 2015-08-29 23:55:58 (GMT) |
|---|---|---|
| committer | Chris Zankel <chris@zankel.net> | 2015-08-29 23:55:58 (GMT) |
| commit | 650c919798c71fb34b77a6f2ba03a06907f06a76 (patch) | |
| tree | d1c60012d4d86846d25f1d0b783b5122c26a2e31 /drivers/ata/ahci_brcmstb.c | |
| parent | 895fb3159280fe7695b35ec7c87ec19e13ca5b6e (diff) | |
| parent | 64291f7db5bd8150a74ad2036f1037e6a0428df2 (diff) | |
| download | linux-650c919798c71fb34b77a6f2ba03a06907f06a76.tar.xz | |
Merge tag 'v4.2' into for_next
Linux 4.2
Diffstat (limited to 'drivers/ata/ahci_brcmstb.c')
| -rw-r--r-- | drivers/ata/ahci_brcmstb.c | 6 |
1 files changed, 4 insertions, 2 deletions
diff --git a/drivers/ata/ahci_brcmstb.c b/drivers/ata/ahci_brcmstb.c index ce1e3a8..14b7305 100644 --- a/drivers/ata/ahci_brcmstb.c +++ b/drivers/ata/ahci_brcmstb.c @@ -92,7 +92,7 @@ static inline u32 brcm_sata_readreg(void __iomem *addr) * Other architectures (e.g., ARM) either do not support big endian, or * else leave I/O in little endian mode. */ - if (IS_ENABLED(CONFIG_MIPS) && IS_ENABLED(__BIG_ENDIAN)) + if (IS_ENABLED(CONFIG_MIPS) && IS_ENABLED(CONFIG_CPU_BIG_ENDIAN)) return __raw_readl(addr); else return readl_relaxed(addr); @@ -101,7 +101,7 @@ static inline u32 brcm_sata_readreg(void __iomem *addr) static inline void brcm_sata_writereg(u32 val, void __iomem *addr) { /* See brcm_sata_readreg() comments */ - if (IS_ENABLED(CONFIG_MIPS) && IS_ENABLED(__BIG_ENDIAN)) + if (IS_ENABLED(CONFIG_MIPS) && IS_ENABLED(CONFIG_CPU_BIG_ENDIAN)) __raw_writel(val, addr); else writel_relaxed(val, addr); @@ -209,6 +209,7 @@ static void brcm_sata_init(struct brcm_ahci_priv *priv) priv->top_ctrl + SATA_TOP_CTRL_BUS_CTRL); } +#ifdef CONFIG_PM_SLEEP static int brcm_ahci_suspend(struct device *dev) { struct ata_host *host = dev_get_drvdata(dev); @@ -231,6 +232,7 @@ static int brcm_ahci_resume(struct device *dev) brcm_sata_phys_enable(priv); return ahci_platform_resume(dev); } +#endif static struct scsi_host_template ahci_platform_sht = { AHCI_SHT(DRV_NAME), |