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authorTejun Heo <htejun@gmail.com>2007-11-19 03:06:37 (GMT)
committerTejun Heo <htejun@gmail.com>2007-11-19 04:10:04 (GMT)
commita0ce9aca97ccf71dc969b44a4c9b3c36da0be362 (patch)
tree96d1883949ecdf8b73cd0ce3f2541046eb85593a /drivers/ata/ata_piix.c
parent8d8ef2fb931d1035e1f02095086cfd3f78eafe3f (diff)
downloadlinux-a0ce9aca97ccf71dc969b44a4c9b3c36da0be362.tar.xz
ata_piix: port enable for the first SATA controller of ICH8 is 0xf not 0x3
ICH8 and 9 use two SFF controllers to show 6 SATA ports. The first controllre hosts the first 4 ports while the second one hosts the last 2. The PCS register of the first controller encompasses the first four ports or all six ports depending on configuration while PCS of the second controller controls the last two ports. Using 0xf for the first controller and 0x3 for the second controller always result in the correct configuration. Signed-off-by: Tejun Heo <htejun@gmail.com>
Diffstat (limited to 'drivers/ata/ata_piix.c')
-rw-r--r--drivers/ata/ata_piix.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/ata/ata_piix.c b/drivers/ata/ata_piix.c
index d5ff1d8..671e796 100644
--- a/drivers/ata/ata_piix.c
+++ b/drivers/ata/ata_piix.c
@@ -430,7 +430,7 @@ static const struct piix_map_db ich6m_map_db = {
static const struct piix_map_db ich8_map_db = {
.mask = 0x3,
- .port_enable = 0x3,
+ .port_enable = 0xf,
.map = {
/* PM PS SM SS MAP */
{ P0, P2, P1, P3 }, /* 00b (hardwired when in AHCI) */