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authorMark Rutland <mark.rutland@arm.com>2016-08-11 09:50:41 (GMT)
committerPawel Moll <pawel.moll@arm.com>2016-08-26 08:16:07 (GMT)
commit0811ef7e2f5470833a353426a6fbe0b845aea926 (patch)
treeea99c07b63fbc4606adc8e2a060c2318e6c7102f /drivers/bus
parent3249bce459ff0bb7c1621b00a8e2d6afe24c53bb (diff)
downloadlinux-0811ef7e2f5470833a353426a6fbe0b845aea926.tar.xz
bus: arm-ccn: fix PMU interrupt flags
Currently the IRQ core is permitted to make the CCN PMU IRQ handler threaded, and will allow userspace to change the CPU affinity of the interrupt behind our back. Both of these could violate our synchronisation requirements with the core perf code, which relies upon strict CPU affinity and disabling of interrupts to guarantee mutual exclusion in some cases. As with the CPU PMU drivers, we should request the interrupt with IRQF_NOBALANCING and IRQF_NO_THREAD, to avoid these issues. Signed-off-by: Mark Rutland <mark.rutland@arm.com> Acked-by: Pawel Moll <pawel.moll@arm.com> Reviewed-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Pawel Moll <pawel.moll@arm.com>
Diffstat (limited to 'drivers/bus')
-rw-r--r--drivers/bus/arm-ccn.c5
1 files changed, 3 insertions, 2 deletions
diff --git a/drivers/bus/arm-ccn.c b/drivers/bus/arm-ccn.c
index 02f81e3..c826bb2 100644
--- a/drivers/bus/arm-ccn.c
+++ b/drivers/bus/arm-ccn.c
@@ -1496,8 +1496,9 @@ static int arm_ccn_probe(struct platform_device *pdev)
/* Can set 'disable' bits, so can acknowledge interrupts */
writel(CCN_MN_ERRINT_STATUS__PMU_EVENTS__ENABLE,
ccn->base + CCN_MN_ERRINT_STATUS);
- err = devm_request_irq(ccn->dev, irq, arm_ccn_irq_handler, 0,
- dev_name(ccn->dev), ccn);
+ err = devm_request_irq(ccn->dev, irq, arm_ccn_irq_handler,
+ IRQF_NOBALANCING | IRQF_NO_THREAD,
+ dev_name(ccn->dev), ccn);
if (err)
return err;