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| author | Tang Yuantian <yuantian.tang@freescale.com> | 2014-01-21 01:32:45 (GMT) |
|---|---|---|
| committer | Mike Turquette <mturquette@linaro.org> | 2014-03-20 00:04:14 (GMT) |
| commit | 00fa6e5d138a87f1b1bc8ae634c5f6fe513338c6 (patch) | |
| tree | b4d3fb9d0e444ea484bd76bf2a27cd990157ae97 /drivers/clk/clk.c | |
| parent | 141c71dd2c00ca7d807138ece55a17c61085c793 (diff) | |
| download | linux-00fa6e5d138a87f1b1bc8ae634c5f6fe513338c6.tar.xz | |
clk: mpc85xx: Update the driver to align to new clock bindings
The clock bindings for Freescale CoreNet platform are updated.
So, the driver needs to be updated accordingly.
The main changes include:
- Added a new node to present the input system clock
- Changed PLL and MUX's compatible string
Signed-off-by: Tang Yuantian <Yuantian.Tang@freescale.com>
Acked-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
Diffstat (limited to 'drivers/clk/clk.c')
0 files changed, 0 insertions, 0 deletions