diff options
| author | Stephen Boyd <sboyd@codeaurora.org> | 2015-07-31 00:20:57 (GMT) |
|---|---|---|
| committer | Michael Turquette <mturquette@baylibre.com> | 2015-08-24 23:48:57 (GMT) |
| commit | 5cdb1dc50be615aa26f8952e4b6f67b483849e97 (patch) | |
| tree | e7bf934d714c97601759c52cb3ece59ee1abba7e /drivers/clk/tegra/clk-pll.c | |
| parent | 1b14afa64d2ef36f228e9540664586fd7ad67a81 (diff) | |
| download | linux-5cdb1dc50be615aa26f8952e4b6f67b483849e97.tar.xz | |
clk: tegra: Convert to clk_hw based provider APIs
We're removing struct clk from the clk provider API, so switch
this code to using the clk_hw based provider APIs.
Cc: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Cc: Thierry Reding <treding@nvidia.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Diffstat (limited to 'drivers/clk/tegra/clk-pll.c')
| -rw-r--r-- | drivers/clk/tegra/clk-pll.c | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/drivers/clk/tegra/clk-pll.c b/drivers/clk/tegra/clk-pll.c index 63499c4..69fea7d 100644 --- a/drivers/clk/tegra/clk-pll.c +++ b/drivers/clk/tegra/clk-pll.c @@ -634,7 +634,7 @@ static long clk_pll_round_rate(struct clk_hw *hw, unsigned long rate, /* PLLM is used for memory; we do not change rate */ if (pll->params->flags & TEGRA_PLLM) - return __clk_get_rate(hw->clk); + return clk_hw_get_rate(hw); if (_get_table_rate(hw, &cfg, rate, *prate) && _calc_rate(hw, &cfg, rate, *prate)) @@ -1577,7 +1577,7 @@ struct clk *tegra_clk_register_pllxc(const char *name, const char *parent_name, if (!pll_params->pdiv_tohw) return ERR_PTR(-EINVAL); - parent_rate = __clk_get_rate(parent); + parent_rate = clk_get_rate(parent); pll_params->vco_min = _clip_vco_min(pll_params->vco_min, parent_rate); @@ -1674,7 +1674,7 @@ struct clk *tegra_clk_register_pllm(const char *name, const char *parent_name, return ERR_PTR(-EINVAL); } - parent_rate = __clk_get_rate(parent); + parent_rate = clk_get_rate(parent); pll_params->vco_min = _clip_vco_min(pll_params->vco_min, parent_rate); @@ -1715,7 +1715,7 @@ struct clk *tegra_clk_register_pllc(const char *name, const char *parent_name, return ERR_PTR(-EINVAL); } - parent_rate = __clk_get_rate(parent); + parent_rate = clk_get_rate(parent); pll_params->vco_min = _clip_vco_min(pll_params->vco_min, parent_rate); @@ -1848,7 +1848,7 @@ struct clk *tegra_clk_register_pllss(const char *name, const char *parent_name, val &= ~PLLSS_REF_SRC_SEL_MASK; pll_writel_base(val, pll); - parent_rate = __clk_get_rate(parent); + parent_rate = clk_get_rate(parent); pll_params->vco_min = _clip_vco_min(pll_params->vco_min, parent_rate); |