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authorAlexandre Courbot <acourbot@nvidia.com>2013-11-21 02:38:10 (GMT)
committerPeter De Schrijver <pdeschrijver@nvidia.com>2013-11-26 16:46:57 (GMT)
commit5ab5d4048e6ed8811245a4ea45264456c180545e (patch)
tree1c7b1a386a1d1137c4980858a79e7aa9de72a208 /drivers/clk/tegra/clk-tegra124.c
parentc04bf559264de4f986463c639fabef2028542924 (diff)
downloadlinux-5ab5d4048e6ed8811245a4ea45264456c180545e.tar.xz
clk: tegra: add FUSE clock device
This clock is needed to ensure the FUSE registers can be accessed without freezing the system. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Diffstat (limited to 'drivers/clk/tegra/clk-tegra124.c')
-rw-r--r--drivers/clk/tegra/clk-tegra124.c1
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/clk/tegra/clk-tegra124.c b/drivers/clk/tegra/clk-tegra124.c
index 8af9d39..0ef4485 100644
--- a/drivers/clk/tegra/clk-tegra124.c
+++ b/drivers/clk/tegra/clk-tegra124.c
@@ -1009,6 +1009,7 @@ static struct tegra_devclk devclks[] __initdata = {
{ .con_id = "sclk", .dt_id = TEGRA124_CLK_SCLK },
{ .con_id = "hclk", .dt_id = TEGRA124_CLK_HCLK },
{ .con_id = "pclk", .dt_id = TEGRA124_CLK_PCLK },
+ { .con_id = "fuse", .dt_id = TEGRA124_CLK_FUSE },
{ .dev_id = "rtc-tegra", .dt_id = TEGRA124_CLK_RTC },
{ .dev_id = "timer", .dt_id = TEGRA124_CLK_TIMER },
};