diff options
| author | Mikko Perttunen <mperttunen@nvidia.com> | 2015-03-12 14:48:05 (GMT) |
|---|---|---|
| committer | Thierry Reding <treding@nvidia.com> | 2015-05-13 13:17:11 (GMT) |
| commit | 2db04f16b589c6c96bd07df3f1ef8558bfdb6810 (patch) | |
| tree | 1aa1384bd34defda0a55f8e068d5d64aa8260b49 /drivers/clk/tegra/clk-tegra124.c | |
| parent | 374ffadaf3abd4bf77073bd8f1acf0ada7dc797e (diff) | |
| download | linux-2db04f16b589c6c96bd07df3f1ef8558bfdb6810.tar.xz | |
clk: tegra: Add EMC clock driver
The driver is currently only tested on Tegra124 Jetson TK1, but should
work with other Tegra124 boards, provided that correct EMC tables are
provided through the device tree. Older chip models have differing
timing change sequences, so they are not currently supported.
Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com>
Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
[treding@nvidia.com: use more consistent function names]
Signed-off-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'drivers/clk/tegra/clk-tegra124.c')
| -rw-r--r-- | drivers/clk/tegra/clk-tegra124.c | 5 |
1 files changed, 4 insertions, 1 deletions
diff --git a/drivers/clk/tegra/clk-tegra124.c b/drivers/clk/tegra/clk-tegra124.c index 62fe3cf..096261d 100644 --- a/drivers/clk/tegra/clk-tegra124.c +++ b/drivers/clk/tegra/clk-tegra124.c @@ -1388,7 +1388,6 @@ static struct tegra_clk_init_table common_init_table[] __initdata = { {TEGRA124_CLK_XUSB_HOST_SRC, TEGRA124_CLK_PLL_RE_OUT, 112000000, 0}, {TEGRA124_CLK_SATA, TEGRA124_CLK_PLL_P, 104000000, 0}, {TEGRA124_CLK_SATA_OOB, TEGRA124_CLK_PLL_P, 204000000, 0}, - {TEGRA124_CLK_EMC, TEGRA124_CLK_CLK_MAX, 0, 1}, {TEGRA124_CLK_MSELECT, TEGRA124_CLK_CLK_MAX, 0, 1}, {TEGRA124_CLK_CSITE, TEGRA124_CLK_CLK_MAX, 0, 1}, {TEGRA124_CLK_TSENSOR, TEGRA124_CLK_CLK_M, 400000, 0}, @@ -1512,6 +1511,10 @@ static void __init tegra124_132_clock_init_post(struct device_node *np) tegra_super_clk_gen4_init(clk_base, pmc_base, tegra124_clks, &pll_x_params); tegra_add_of_provider(np); + + clks[TEGRA124_CLK_EMC] = tegra_clk_register_emc(clk_base, np, + &emc_lock); + tegra_register_devclks(devclks, ARRAY_SIZE(devclks)); tegra_cpu_car_ops = &tegra124_cpu_car_ops; |