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authorMikko Perttunen <mperttunen@nvidia.com>2015-03-12 14:48:05 (GMT)
committerThierry Reding <treding@nvidia.com>2015-05-13 13:17:11 (GMT)
commit2db04f16b589c6c96bd07df3f1ef8558bfdb6810 (patch)
tree1aa1384bd34defda0a55f8e068d5d64aa8260b49 /drivers/clk/tegra/clk.h
parent374ffadaf3abd4bf77073bd8f1acf0ada7dc797e (diff)
downloadlinux-2db04f16b589c6c96bd07df3f1ef8558bfdb6810.tar.xz
clk: tegra: Add EMC clock driver
The driver is currently only tested on Tegra124 Jetson TK1, but should work with other Tegra124 boards, provided that correct EMC tables are provided through the device tree. Older chip models have differing timing change sequences, so they are not currently supported. Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com> Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com> [treding@nvidia.com: use more consistent function names] Signed-off-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'drivers/clk/tegra/clk.h')
-rw-r--r--drivers/clk/tegra/clk.h3
1 files changed, 3 insertions, 0 deletions
diff --git a/drivers/clk/tegra/clk.h b/drivers/clk/tegra/clk.h
index d6ac006..e69e98a 100644
--- a/drivers/clk/tegra/clk.h
+++ b/drivers/clk/tegra/clk.h
@@ -623,6 +623,9 @@ void tegra_super_clk_gen4_init(void __iomem *clk_base,
void __iomem *pmc_base, struct tegra_clk *tegra_clks,
struct tegra_clk_pll_params *pll_params);
+struct clk *tegra_clk_register_emc(void __iomem *base, struct device_node *np,
+ spinlock_t *lock);
+
void tegra114_clock_tune_cpu_trimmers_high(void);
void tegra114_clock_tune_cpu_trimmers_low(void);
void tegra114_clock_tune_cpu_trimmers_init(void);