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authorMaxime Ripard <maxime.ripard@free-electrons.com>2014-07-10 21:53:40 (GMT)
committerMaxime Ripard <maxime.ripard@free-electrons.com>2014-09-27 06:58:02 (GMT)
commit03e29bbf40ed87657795c774c80449bb86a55415 (patch)
tree6774d497b4b17ad9bc3c242e9627c1e9363a2fbd /drivers/clk
parent601da9d0a54c0fea7f5a208bc107d7ef1de4f570 (diff)
downloadlinux-03e29bbf40ed87657795c774c80449bb86a55415.tar.xz
clk: sunxi: Introduce mbus compatible
Even though the mbus clock is a regular module clock, given its nature, it needs to be enabled all the time. Introduce a new compatible, to differentiate it from the other module clocks. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Hans de Goede <hdegoede@redhat.com>
Diffstat (limited to 'drivers/clk')
-rw-r--r--drivers/clk/sunxi/clk-sunxi.c1
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/clk/sunxi/clk-sunxi.c b/drivers/clk/sunxi/clk-sunxi.c
index 393df32..17e1e3b 100644
--- a/drivers/clk/sunxi/clk-sunxi.c
+++ b/drivers/clk/sunxi/clk-sunxi.c
@@ -1119,6 +1119,7 @@ static const struct of_device_id clk_factors_match[] __initconst = {
{.compatible = "allwinner,sun7i-a20-pll4-clk", .data = &sun7i_a20_pll4_data,},
{.compatible = "allwinner,sun6i-a31-pll6-clk", .data = &sun6i_a31_pll6_data,},
{.compatible = "allwinner,sun4i-a10-apb1-clk", .data = &sun4i_apb1_data,},
+ {.compatible = "allwinner,sun5i-a13-mbus-clk", .data = &sun4i_mod0_data,},
{.compatible = "allwinner,sun4i-a10-mod0-clk", .data = &sun4i_mod0_data,},
{.compatible = "allwinner,sun7i-a20-out-clk", .data = &sun7i_a20_out_data,},
{}