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author | Qianqian Xie <xieqianqian@huawei.com> | 2016-06-21 03:56:21 (GMT) |
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committer | David S. Miller <davem@davemloft.net> | 2016-06-21 08:51:54 (GMT) |
commit | 0b03fd8528f7bf00b5c058212d69f92cf123bf30 (patch) | |
tree | 2f03e7c83cc604cd6d4154883faab325fb3fc9f9 /drivers/cpufreq/dbx500-cpufreq.c | |
parent | 4906ce45978ca958da687d6706a9ee85162ef69d (diff) | |
download | linux-0b03fd8528f7bf00b5c058212d69f92cf123bf30.tar.xz |
net: hns: bug fix of ge reset sequence
The bit fileds of PPE reset register are different between HNS v1 and
HNS v2, but the current procedure just only match HNS v1. Here is a
patch to fix it.
Signed-off-by: Kejian Yan <yankejian@huawei.com>
Signed-off-by: Qianqian Xie <xieqianqian@huawei.com>
Signed-off-by: Yisen Zhuang <Yisen.Zhuang@huawei.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/cpufreq/dbx500-cpufreq.c')
0 files changed, 0 insertions, 0 deletions