diff options
| author | Mauro Carvalho Chehab <mchehab@redhat.com> | 2013-01-10 16:31:43 (GMT) |
|---|---|---|
| committer | Mauro Carvalho Chehab <mchehab@redhat.com> | 2013-02-21 14:06:22 (GMT) |
| commit | 5f466cb0257998549058c16e9d44bb74804a273d (patch) | |
| tree | 536824f929bc546ae0a9d0946ff52c4fc8a79919 /drivers/edac | |
| parent | 1339730e73f14673ad55bddda119982504633da9 (diff) | |
| download | linux-5f466cb0257998549058c16e9d44bb74804a273d.tar.xz | |
i3200_edac: Add more debug to the driver
Currently, it is not possible to know, when debug is enabled,
if the driver is using 2 DIMMS per channel mode or not. It is
not possible to know the values of the drbs registers, used
to identify the memory rank sizes.
Add debug for both, as it helps to track issues on the driver.
Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
Diffstat (limited to 'drivers/edac')
| -rw-r--r-- | drivers/edac/i3200_edac.c | 16 |
1 files changed, 14 insertions, 2 deletions
diff --git a/drivers/edac/i3200_edac.c b/drivers/edac/i3200_edac.c index 4e83376..2064192 100644 --- a/drivers/edac/i3200_edac.c +++ b/drivers/edac/i3200_edac.c @@ -106,16 +106,26 @@ static int nr_channels; static int how_many_channels(struct pci_dev *pdev) { + int n_channels; + unsigned char capid0_8b; /* 8th byte of CAPID0 */ pci_read_config_byte(pdev, I3200_CAPID0 + 8, &capid0_8b); + if (capid0_8b & 0x20) { /* check DCD: Dual Channel Disable */ edac_dbg(0, "In single channel mode\n"); - return 1; + n_channels = 1; } else { edac_dbg(0, "In dual channel mode\n"); - return 2; + n_channels = 2; } + + if (capid0_8b & 0x10) /* check if both channels are filled */ + edac_dbg(0, "2 DIMMS per channel disabled\n"); + else + edac_dbg(0, "2 DIMMS per channel enabled\n"); + + return n_channels; } static unsigned long eccerrlog_syndrome(u64 log) @@ -290,6 +300,8 @@ static void i3200_get_drbs(void __iomem *window, for (i = 0; i < I3200_RANKS_PER_CHANNEL; i++) { drbs[0][i] = readw(window + I3200_C0DRB + 2*i) & I3200_DRB_MASK; drbs[1][i] = readw(window + I3200_C1DRB + 2*i) & I3200_DRB_MASK; + + edac_dbg(0, "drb[0][%d] = %d, drb[1][%d] = %d\n", i, drbs[0][i], i, drbs[1][i]); } } |