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authorRicardo Ribalda Delgado <ricardo.ribalda@gmail.com>2015-10-28 15:16:02 (GMT)
committerMark Brown <broonie@kernel.org>2015-10-29 00:03:42 (GMT)
commiteca37c7c117460e2fbe4e32c991bff32a961f688 (patch)
treec4004827a2515d3db02bc1be219b12b8dba6221a /drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c
parent6ff33f3902c3b1c5d0db6b1e2c70b6d76fba357f (diff)
downloadlinux-eca37c7c117460e2fbe4e32c991bff32a961f688.tar.xz
spi/spi-xilinx: Fix race condition on last word read
Some users have reported that in polled mode the driver fails randomly to read the last word of the transfer. The end condition used for the transmissions (in polled and irq mode) has been the TX_EMPTY flag. But Lars-Peter Clausen has identified a delay from the TX_EMPTY to the actual end of the data rx. I believe that this race condition has not been detected until now because of the latency added by the IRQ handler or the PCIe bridge. This bugs affects setups with low latency access to the spi core. This patch replaces the readout logic: For all the words, except the last one, the TX_EMPTY flag is used (and cached). If !TX_EMPY or is the last word. The status register is read and the RX_EMPTY flag is used. The performance is not affected: there is an extra read of the Status Register, but the readout can start as soon as there is a word in the buffer. Reported-by: Edward Kigwana <ekigwana@scires.com> Initial-fix-by: Lars-Peter Clausen <lars@metafoo.de> Signed-off-by: Ricardo Ribalda Delgado <ricardo.ribalda@gmail.com> Signed-off-by: Mark Brown <broonie@kernel.org> Cc: stable@vger.kernel.org
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c')
0 files changed, 0 insertions, 0 deletions