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| author | Ville Syrjälä <ville.syrjala@linux.intel.com> | 2013-01-25 19:44:48 (GMT) |
|---|---|---|
| committer | Daniel Vetter <daniel.vetter@ffwll.ch> | 2013-01-31 10:50:13 (GMT) |
| commit | 209d52110a32c2069b5d870504e73fdb0e30fc51 (patch) | |
| tree | d3d0748f1f9fe095d18512105926d5dab813bb59 /drivers/gpu/drm/i915 | |
| parent | fe31b574fb2563f3aaa24dec302ddd0a033cda0f (diff) | |
| download | linux-209d52110a32c2069b5d870504e73fdb0e30fc51.tar.xz | |
drm/i915: Set the SR01 "screen off" bit in i915_redisable_vga() too
From BSpec / SR01 - Clocking Mode:
"The following sequence must be used when disabling the VGA plane.
Write SR01 to set bit 5 = 1 to disable video output.
Wait for 100us.
Disable the VGA plane via Bit 31 of the MMIO VGA control."
So simply call i915_disable_vga() from i915_redisable_vga().
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915')
| -rw-r--r-- | drivers/gpu/drm/i915/intel_display.c | 3 |
1 files changed, 1 insertions, 2 deletions
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index 62f4590..d75c6a0 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -8936,8 +8936,7 @@ void i915_redisable_vga(struct drm_device *dev) if (I915_READ(vga_reg) != VGA_DISP_DISABLE) { DRM_DEBUG_KMS("Something enabled VGA plane, disabling it\n"); - I915_WRITE(vga_reg, VGA_DISP_DISABLE); - POSTING_READ(vga_reg); + i915_disable_vga(dev); } } |