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author | Ben Skeggs <bskeggs@redhat.com> | 2013-01-31 04:57:33 (GMT) |
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committer | Ben Skeggs <bskeggs@redhat.com> | 2013-02-20 06:00:48 (GMT) |
commit | e18c080fb8695d038f69c26c248f5ecbd9e8aa77 (patch) | |
tree | 74e191678bb9ba028d85e219863ddb706f4e6fc8 /drivers/gpu/drm/nouveau/nv84_fence.c | |
parent | a2fa297378c54e9b8b8ad355e34c9fbed730250b (diff) | |
download | linux-e18c080fb8695d038f69c26c248f5ecbd9e8aa77.tar.xz |
drm/nouveau/fence/nv84-: put processes to sleep while waiting on fences
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Diffstat (limited to 'drivers/gpu/drm/nouveau/nv84_fence.c')
-rw-r--r-- | drivers/gpu/drm/nouveau/nv84_fence.c | 8 |
1 files changed, 6 insertions, 2 deletions
diff --git a/drivers/gpu/drm/nouveau/nv84_fence.c b/drivers/gpu/drm/nouveau/nv84_fence.c index c686650..e64e815 100644 --- a/drivers/gpu/drm/nouveau/nv84_fence.c +++ b/drivers/gpu/drm/nouveau/nv84_fence.c @@ -47,15 +47,16 @@ nv84_fence_emit(struct nouveau_fence *fence) { struct nouveau_channel *chan = fence->channel; struct nouveau_fifo_chan *fifo = (void *)chan->object; - int ret = RING_SPACE(chan, 7); + int ret = RING_SPACE(chan, 8); if (ret == 0) { BEGIN_NV04(chan, 0, NV11_SUBCHAN_DMA_SEMAPHORE, 1); OUT_RING (chan, NvSema); - BEGIN_NV04(chan, 0, NV84_SUBCHAN_SEMAPHORE_ADDRESS_HIGH, 4); + BEGIN_NV04(chan, 0, NV84_SUBCHAN_SEMAPHORE_ADDRESS_HIGH, 5); OUT_RING (chan, upper_32_bits(fifo->chid * 16)); OUT_RING (chan, lower_32_bits(fifo->chid * 16)); OUT_RING (chan, fence->sequence); OUT_RING (chan, NV84_SUBCHAN_SEMAPHORE_TRIGGER_WRITE_LONG); + OUT_RING (chan, 0x00000000); FIRE_RING (chan); } return ret; @@ -174,6 +175,9 @@ nv84_fence_create(struct nouveau_drm *drm) priv->base.sync = nv84_fence_sync; priv->base.read = nv84_fence_read; + init_waitqueue_head(&priv->base.waiting); + priv->base.uevent = true; + ret = nouveau_gpuobj_new(drm->device, NULL, chan * 16, 0x1000, 0, &priv->mem); if (ret) |