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authorBen Skeggs <bskeggs@redhat.com>2015-08-20 04:54:21 (GMT)
committerBen Skeggs <bskeggs@redhat.com>2015-08-28 02:40:45 (GMT)
commita4f7bd360893ab4f6bbc1ae4ef617c68bf987f3d (patch)
tree679b2c23ff9083fefda7a3bd312098d1a554fed4 /drivers/gpu/drm/nouveau/nvkm/engine/device/base.c
parentc9582455ab74246ec9f5986db3821b33058de585 (diff)
downloadlinux-a4f7bd360893ab4f6bbc1ae4ef617c68bf987f3d.tar.xz
drm/nouveau/mxm: convert to new-style nvkm_subdev
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Diffstat (limited to 'drivers/gpu/drm/nouveau/nvkm/engine/device/base.c')
-rw-r--r--drivers/gpu/drm/nouveau/nvkm/engine/device/base.c66
1 files changed, 33 insertions, 33 deletions
diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/device/base.c b/drivers/gpu/drm/nouveau/nvkm/engine/device/base.c
index 7da5dc4..350daa3 100644
--- a/drivers/gpu/drm/nouveau/nvkm/engine/device/base.c
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/device/base.c
@@ -790,7 +790,7 @@ nv50_chipset = {
.imem = nv50_instmem_new,
.mc = nv50_mc_new,
.mmu = nv50_mmu_new,
-// .mxm = nv50_mxm_new,
+ .mxm = nv50_mxm_new,
// .therm = nv50_therm_new,
// .timer = nv04_timer_new,
// .volt = nv40_volt_new,
@@ -893,7 +893,7 @@ nv84_chipset = {
.imem = nv50_instmem_new,
.mc = nv50_mc_new,
.mmu = nv50_mmu_new,
-// .mxm = nv50_mxm_new,
+ .mxm = nv50_mxm_new,
// .therm = g84_therm_new,
// .timer = nv04_timer_new,
// .volt = nv40_volt_new,
@@ -924,7 +924,7 @@ nv86_chipset = {
.imem = nv50_instmem_new,
.mc = nv50_mc_new,
.mmu = nv50_mmu_new,
-// .mxm = nv50_mxm_new,
+ .mxm = nv50_mxm_new,
// .therm = g84_therm_new,
// .timer = nv04_timer_new,
// .volt = nv40_volt_new,
@@ -955,7 +955,7 @@ nv92_chipset = {
.imem = nv50_instmem_new,
.mc = nv50_mc_new,
.mmu = nv50_mmu_new,
-// .mxm = nv50_mxm_new,
+ .mxm = nv50_mxm_new,
// .therm = g84_therm_new,
// .timer = nv04_timer_new,
// .volt = nv40_volt_new,
@@ -986,7 +986,7 @@ nv94_chipset = {
.imem = nv50_instmem_new,
.mc = g94_mc_new,
.mmu = nv50_mmu_new,
-// .mxm = nv50_mxm_new,
+ .mxm = nv50_mxm_new,
// .therm = g84_therm_new,
// .timer = nv04_timer_new,
// .volt = nv40_volt_new,
@@ -1011,7 +1011,7 @@ nv96_chipset = {
.fuse = nv50_fuse_new,
.clk = g84_clk_new,
// .therm = g84_therm_new,
-// .mxm = nv50_mxm_new,
+ .mxm = nv50_mxm_new,
.devinit = g84_devinit_new,
.mc = g94_mc_new,
.bus = g94_bus_new,
@@ -1042,7 +1042,7 @@ nv98_chipset = {
.fuse = nv50_fuse_new,
.clk = g84_clk_new,
// .therm = g84_therm_new,
-// .mxm = nv50_mxm_new,
+ .mxm = nv50_mxm_new,
.devinit = g98_devinit_new,
.mc = g98_mc_new,
.bus = g94_bus_new,
@@ -1079,7 +1079,7 @@ nva0_chipset = {
.imem = nv50_instmem_new,
.mc = g98_mc_new,
.mmu = nv50_mmu_new,
-// .mxm = nv50_mxm_new,
+ .mxm = nv50_mxm_new,
// .therm = g84_therm_new,
// .timer = nv04_timer_new,
// .volt = nv40_volt_new,
@@ -1110,7 +1110,7 @@ nva3_chipset = {
.imem = nv50_instmem_new,
.mc = g98_mc_new,
.mmu = nv50_mmu_new,
-// .mxm = nv50_mxm_new,
+ .mxm = nv50_mxm_new,
// .pmu = gt215_pmu_new,
// .therm = gt215_therm_new,
// .timer = nv04_timer_new,
@@ -1143,7 +1143,7 @@ nva5_chipset = {
.imem = nv50_instmem_new,
.mc = g98_mc_new,
.mmu = nv50_mmu_new,
-// .mxm = nv50_mxm_new,
+ .mxm = nv50_mxm_new,
// .pmu = gt215_pmu_new,
// .therm = gt215_therm_new,
// .timer = nv04_timer_new,
@@ -1175,7 +1175,7 @@ nva8_chipset = {
.imem = nv50_instmem_new,
.mc = g98_mc_new,
.mmu = nv50_mmu_new,
-// .mxm = nv50_mxm_new,
+ .mxm = nv50_mxm_new,
// .pmu = gt215_pmu_new,
// .therm = gt215_therm_new,
// .timer = nv04_timer_new,
@@ -1207,7 +1207,7 @@ nvaa_chipset = {
.imem = nv50_instmem_new,
.mc = g98_mc_new,
.mmu = nv50_mmu_new,
-// .mxm = nv50_mxm_new,
+ .mxm = nv50_mxm_new,
// .therm = g84_therm_new,
// .timer = nv04_timer_new,
// .volt = nv40_volt_new,
@@ -1238,7 +1238,7 @@ nvac_chipset = {
.imem = nv50_instmem_new,
.mc = g98_mc_new,
.mmu = nv50_mmu_new,
-// .mxm = nv50_mxm_new,
+ .mxm = nv50_mxm_new,
// .therm = g84_therm_new,
// .timer = nv04_timer_new,
// .volt = nv40_volt_new,
@@ -1269,7 +1269,7 @@ nvaf_chipset = {
.imem = nv50_instmem_new,
.mc = g98_mc_new,
.mmu = nv50_mmu_new,
-// .mxm = nv50_mxm_new,
+ .mxm = nv50_mxm_new,
// .pmu = gt215_pmu_new,
// .therm = gt215_therm_new,
// .timer = nv04_timer_new,
@@ -1303,7 +1303,7 @@ nvc0_chipset = {
.ltc = gf100_ltc_new,
.mc = gf100_mc_new,
.mmu = gf100_mmu_new,
-// .mxm = nv50_mxm_new,
+ .mxm = nv50_mxm_new,
// .pmu = gf100_pmu_new,
// .therm = gt215_therm_new,
// .timer = nv04_timer_new,
@@ -1338,7 +1338,7 @@ nvc1_chipset = {
.ltc = gf100_ltc_new,
.mc = gf106_mc_new,
.mmu = gf100_mmu_new,
-// .mxm = nv50_mxm_new,
+ .mxm = nv50_mxm_new,
// .pmu = gf100_pmu_new,
// .therm = gt215_therm_new,
// .timer = nv04_timer_new,
@@ -1372,7 +1372,7 @@ nvc3_chipset = {
.ltc = gf100_ltc_new,
.mc = gf106_mc_new,
.mmu = gf100_mmu_new,
-// .mxm = nv50_mxm_new,
+ .mxm = nv50_mxm_new,
// .pmu = gf100_pmu_new,
// .therm = gt215_therm_new,
// .timer = nv04_timer_new,
@@ -1406,7 +1406,7 @@ nvc4_chipset = {
.ltc = gf100_ltc_new,
.mc = gf100_mc_new,
.mmu = gf100_mmu_new,
-// .mxm = nv50_mxm_new,
+ .mxm = nv50_mxm_new,
// .pmu = gf100_pmu_new,
// .therm = gt215_therm_new,
// .timer = nv04_timer_new,
@@ -1441,7 +1441,7 @@ nvc8_chipset = {
.ltc = gf100_ltc_new,
.mc = gf100_mc_new,
.mmu = gf100_mmu_new,
-// .mxm = nv50_mxm_new,
+ .mxm = nv50_mxm_new,
// .pmu = gf100_pmu_new,
// .therm = gt215_therm_new,
// .timer = nv04_timer_new,
@@ -1476,7 +1476,7 @@ nvce_chipset = {
.ltc = gf100_ltc_new,
.mc = gf100_mc_new,
.mmu = gf100_mmu_new,
-// .mxm = nv50_mxm_new,
+ .mxm = nv50_mxm_new,
// .pmu = gf100_pmu_new,
// .therm = gt215_therm_new,
// .timer = nv04_timer_new,
@@ -1511,7 +1511,7 @@ nvcf_chipset = {
.ltc = gf100_ltc_new,
.mc = gf106_mc_new,
.mmu = gf100_mmu_new,
-// .mxm = nv50_mxm_new,
+ .mxm = nv50_mxm_new,
// .pmu = gf100_pmu_new,
// .therm = gt215_therm_new,
// .timer = nv04_timer_new,
@@ -1545,7 +1545,7 @@ nvd7_chipset = {
.ltc = gf100_ltc_new,
.mc = gf106_mc_new,
.mmu = gf100_mmu_new,
-// .mxm = nv50_mxm_new,
+ .mxm = nv50_mxm_new,
// .therm = gf110_therm_new,
// .timer = nv04_timer_new,
// .ce[0] = gf100_ce0_new,
@@ -1577,7 +1577,7 @@ nvd9_chipset = {
.ltc = gf100_ltc_new,
.mc = gf106_mc_new,
.mmu = gf100_mmu_new,
-// .mxm = nv50_mxm_new,
+ .mxm = nv50_mxm_new,
// .pmu = gf110_pmu_new,
// .therm = gf110_therm_new,
// .timer = nv04_timer_new,
@@ -1611,7 +1611,7 @@ nve4_chipset = {
.ltc = gk104_ltc_new,
.mc = gf106_mc_new,
.mmu = gf100_mmu_new,
-// .mxm = nv50_mxm_new,
+ .mxm = nv50_mxm_new,
// .pmu = gk104_pmu_new,
// .therm = gf110_therm_new,
// .timer = nv04_timer_new,
@@ -1647,7 +1647,7 @@ nve6_chipset = {
.ltc = gk104_ltc_new,
.mc = gf106_mc_new,
.mmu = gf100_mmu_new,
-// .mxm = nv50_mxm_new,
+ .mxm = nv50_mxm_new,
// .pmu = gk104_pmu_new,
// .therm = gf110_therm_new,
// .timer = nv04_timer_new,
@@ -1683,7 +1683,7 @@ nve7_chipset = {
.ltc = gk104_ltc_new,
.mc = gf106_mc_new,
.mmu = gf100_mmu_new,
-// .mxm = nv50_mxm_new,
+ .mxm = nv50_mxm_new,
// .pmu = gf110_pmu_new,
// .therm = gf110_therm_new,
// .timer = nv04_timer_new,
@@ -1743,7 +1743,7 @@ nvf0_chipset = {
.ltc = gk104_ltc_new,
.mc = gf106_mc_new,
.mmu = gf100_mmu_new,
-// .mxm = nv50_mxm_new,
+ .mxm = nv50_mxm_new,
// .pmu = gk110_pmu_new,
// .therm = gf110_therm_new,
// .timer = nv04_timer_new,
@@ -1779,7 +1779,7 @@ nvf1_chipset = {
.ltc = gk104_ltc_new,
.mc = gf106_mc_new,
.mmu = gf100_mmu_new,
-// .mxm = nv50_mxm_new,
+ .mxm = nv50_mxm_new,
// .pmu = gk110_pmu_new,
// .therm = gf110_therm_new,
// .timer = nv04_timer_new,
@@ -1815,7 +1815,7 @@ nv106_chipset = {
.ltc = gk104_ltc_new,
.mc = gk20a_mc_new,
.mmu = gf100_mmu_new,
-// .mxm = nv50_mxm_new,
+ .mxm = nv50_mxm_new,
// .pmu = gk208_pmu_new,
// .therm = gf110_therm_new,
// .timer = nv04_timer_new,
@@ -1850,7 +1850,7 @@ nv108_chipset = {
.ltc = gk104_ltc_new,
.mc = gk20a_mc_new,
.mmu = gf100_mmu_new,
-// .mxm = nv50_mxm_new,
+ .mxm = nv50_mxm_new,
// .pmu = gk208_pmu_new,
// .therm = gf110_therm_new,
// .timer = nv04_timer_new,
@@ -1885,7 +1885,7 @@ nv117_chipset = {
.ltc = gm107_ltc_new,
.mc = gk20a_mc_new,
.mmu = gf100_mmu_new,
-// .mxm = nv50_mxm_new,
+ .mxm = nv50_mxm_new,
// .pmu = gk208_pmu_new,
// .therm = gm107_therm_new,
// .timer = gk20a_timer_new,
@@ -1914,7 +1914,7 @@ nv124_chipset = {
.ltc = gm107_ltc_new,
.mc = gk20a_mc_new,
.mmu = gf100_mmu_new,
-// .mxm = nv50_mxm_new,
+ .mxm = nv50_mxm_new,
// .pmu = gk208_pmu_new,
// .timer = gk20a_timer_new,
// .ce[0] = gm204_ce0_new,
@@ -1943,7 +1943,7 @@ nv126_chipset = {
.ltc = gm107_ltc_new,
.mc = gk20a_mc_new,
.mmu = gf100_mmu_new,
-// .mxm = nv50_mxm_new,
+ .mxm = nv50_mxm_new,
// .pmu = gk208_pmu_new,
// .timer = gk20a_timer_new,
// .ce[0] = gm204_ce0_new,