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| author | Ben Skeggs <bskeggs@redhat.com> | 2015-03-20 05:38:23 (GMT) |
|---|---|---|
| committer | Ben Skeggs <bskeggs@redhat.com> | 2015-04-14 07:00:51 (GMT) |
| commit | ed22e684622533f903dfad9beb99d872536c3040 (patch) | |
| tree | 1f5890453126ae4639b6f72c390867ab7ed884ba /drivers/gpu/drm/nouveau/nvkm/engine/gr/gk104.c | |
| parent | f02a0e849dbd16541a1e75ef8c8719bc5f611219 (diff) | |
| download | linux-ed22e684622533f903dfad9beb99d872536c3040.tar.xz | |
drm/nouveau/gr/gk104-gk20a: call pmu to disable any power-gating before ctor()
On some of these chipsets, reading NV_PGRAPH_GPC_GPM_PD_PES_TPC_ID_MASK
can trigger a PRI fault and return an error code instead of a TPC mask,
unless PGOB has been disabled first.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Diffstat (limited to 'drivers/gpu/drm/nouveau/nvkm/engine/gr/gk104.c')
| -rw-r--r-- | drivers/gpu/drm/nouveau/nvkm/engine/gr/gk104.c | 13 |
1 files changed, 12 insertions, 1 deletions
diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/gr/gk104.c b/drivers/gpu/drm/nouveau/nvkm/engine/gr/gk104.c index 489fdd9..9d85238 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/gr/gk104.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/gr/gk104.c @@ -310,6 +310,17 @@ gk104_gr_init(struct nvkm_object *object) return gf100_gr_init_ctxctl(priv); } +int +gk104_gr_ctor(struct nvkm_object *parent, struct nvkm_object *engine, + struct nvkm_oclass *oclass, void *data, u32 size, + struct nvkm_object **pobject) +{ + struct nvkm_pmu *pmu = nvkm_pmu(parent); + if (pmu) + pmu->pgob(pmu, false); + return gf100_gr_ctor(parent, engine, oclass, data, size, pobject); +} + #include "fuc/hubgk104.fuc3.h" static struct gf100_gr_ucode @@ -334,7 +345,7 @@ struct nvkm_oclass * gk104_gr_oclass = &(struct gf100_gr_oclass) { .base.handle = NV_ENGINE(GR, 0xe4), .base.ofuncs = &(struct nvkm_ofuncs) { - .ctor = gf100_gr_ctor, + .ctor = gk104_gr_ctor, .dtor = gf100_gr_dtor, .init = gk104_gr_init, .fini = _nvkm_gr_fini, |