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authorImre Deak <imre.deak@intel.com>2015-11-05 21:04:11 (GMT)
committerJani Nikula <jani.nikula@intel.com>2015-11-06 12:46:05 (GMT)
commit1b0e3a049efe471c399674fd954500ce97438d30 (patch)
treed213cb6a9d966aba2cc3f6699739f999428c01b1 /drivers/gpu/drm/nouveau
parentb291681926a142958112eedde62823230d6afb84 (diff)
downloadlinux-1b0e3a049efe471c399674fd954500ce97438d30.tar.xz
drm/i915/skl: disable display side power well support for now
The display power well support on this platform is in a somewhat broken state atm, so disable it by default. This in effect will get rid of incorrect assert WARNs about the CSR/DMC firmware not being loaded during power well toggling. It also removes a problem during driver loading where a register is accessed while its backing power well is down, resulting in another WARN. Until we come up with the root cause of the second problem and the proper fix for both issues, keep all display side power wells on. Also clarify a bit the option description. Reported-by: Dave Airlie <airlied@redhat.com> Reference: http://mid.gmane.org/CAPM=9tyjBQjSBTKa49cRr6SYkpNW7Pq-fUFznZZ8Y1snvvk7mA@mail.gmail.com Signed-off-by: Imre Deak <imre.deak@intel.com> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/1446757451-2777-1-git-send-email-imre.deak@intel.com Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Diffstat (limited to 'drivers/gpu/drm/nouveau')
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