diff options
author | Ben Skeggs <bskeggs@redhat.com> | 2015-08-20 04:54:10 (GMT) |
---|---|---|
committer | Ben Skeggs <bskeggs@redhat.com> | 2015-08-28 02:40:19 (GMT) |
commit | 2ebfa1bc6ff1a7cded8b662f507d34574ffcc2c6 (patch) | |
tree | 042e732000e25d1c9e5f2b767f1a8d0618c0c956 /drivers/gpu/drm/nouveau | |
parent | 01d64afc2e3238cf1658184427fa2563963c8708 (diff) | |
download | linux-2ebfa1bc6ff1a7cded8b662f507d34574ffcc2c6.tar.xz |
drm/nouveau/kms/nv04: fix incorrect use of register accessors
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Diffstat (limited to 'drivers/gpu/drm/nouveau')
-rw-r--r-- | drivers/gpu/drm/nouveau/dispnv04/dfp.c | 8 | ||||
-rw-r--r-- | drivers/gpu/drm/nouveau/include/nvkm/core/device.h | 14 | ||||
-rw-r--r-- | drivers/gpu/drm/nouveau/include/nvkm/core/subdev.h | 60 | ||||
-rw-r--r-- | drivers/gpu/drm/nouveau/nvkm/core/subdev.c | 1 | ||||
-rw-r--r-- | drivers/gpu/drm/nouveau/nvkm/engine/device/base.c | 11 |
5 files changed, 17 insertions, 77 deletions
diff --git a/drivers/gpu/drm/nouveau/dispnv04/dfp.c b/drivers/gpu/drm/nouveau/dispnv04/dfp.c index 7cfb0cb..61b49c1 100644 --- a/drivers/gpu/drm/nouveau/dispnv04/dfp.c +++ b/drivers/gpu/drm/nouveau/dispnv04/dfp.c @@ -493,11 +493,11 @@ static void nv04_dfp_update_backlight(struct drm_encoder *encoder, int mode) if (dev->pdev->device == 0x0174 || dev->pdev->device == 0x0179 || dev->pdev->device == 0x0189 || dev->pdev->device == 0x0329) { if (mode == DRM_MODE_DPMS_ON) { - nv_mask(device, NV_PBUS_DEBUG_DUALHEAD_CTL, 1 << 31, 1 << 31); - nv_mask(device, NV_PCRTC_GPIO_EXT, 3, 1); + nvif_mask(device, NV_PBUS_DEBUG_DUALHEAD_CTL, 1 << 31, 1 << 31); + nvif_mask(device, NV_PCRTC_GPIO_EXT, 3, 1); } else { - nv_mask(device, NV_PBUS_DEBUG_DUALHEAD_CTL, 1 << 31, 0); - nv_mask(device, NV_PCRTC_GPIO_EXT, 3, 0); + nvif_mask(device, NV_PBUS_DEBUG_DUALHEAD_CTL, 1 << 31, 0); + nvif_mask(device, NV_PCRTC_GPIO_EXT, 3, 0); } } #endif diff --git a/drivers/gpu/drm/nouveau/include/nvkm/core/device.h b/drivers/gpu/drm/nouveau/include/nvkm/core/device.h index 167a0dd..14f7d19 100644 --- a/drivers/gpu/drm/nouveau/include/nvkm/core/device.h +++ b/drivers/gpu/drm/nouveau/include/nvkm/core/device.h @@ -72,6 +72,8 @@ struct nvkm_device { struct device *dev; u64 handle; + void __iomem *pri; + struct nvkm_event event; const char *cfgopt; @@ -148,12 +150,12 @@ struct nvkm_device *nvkm_device_find(u64 name); int nvkm_device_list(u64 *name, int size); /* privileged register interface accessor macros */ -#define nvkm_rd08(d,a) ioread8((d)->engine.subdev.mmio + (a)) -#define nvkm_rd16(d,a) ioread16_native((d)->engine.subdev.mmio + (a)) -#define nvkm_rd32(d,a) ioread32_native((d)->engine.subdev.mmio + (a)) -#define nvkm_wr08(d,a,v) iowrite8((v), (d)->engine.subdev.mmio + (a)) -#define nvkm_wr16(d,a,v) iowrite16_native((v), (d)->engine.subdev.mmio + (a)) -#define nvkm_wr32(d,a,v) iowrite32_native((v), (d)->engine.subdev.mmio + (a)) +#define nvkm_rd08(d,a) ioread8((d)->pri + (a)) +#define nvkm_rd16(d,a) ioread16_native((d)->pri + (a)) +#define nvkm_rd32(d,a) ioread32_native((d)->pri + (a)) +#define nvkm_wr08(d,a,v) iowrite8((v), (d)->pri + (a)) +#define nvkm_wr16(d,a,v) iowrite16_native((v), (d)->pri + (a)) +#define nvkm_wr32(d,a,v) iowrite32_native((v), (d)->pri + (a)) #define nvkm_mask(d,a,m,v) ({ \ struct nvkm_device *_device = (d); \ u32 _addr = (a), _temp = nvkm_rd32(_device, _addr); \ diff --git a/drivers/gpu/drm/nouveau/include/nvkm/core/subdev.h b/drivers/gpu/drm/nouveau/include/nvkm/core/subdev.h index d2dac06..ad516cf 100644 --- a/drivers/gpu/drm/nouveau/include/nvkm/core/subdev.h +++ b/drivers/gpu/drm/nouveau/include/nvkm/core/subdev.h @@ -12,7 +12,6 @@ struct nvkm_subdev { struct mutex mutex; const char *name; - void __iomem *mmio; u32 debug; u32 unit; @@ -60,64 +59,5 @@ int _nvkm_subdev_fini(struct nvkm_object *, bool suspend); } \ } while(0) -static inline u8 -nv_rd08(void *obj, u32 addr) -{ - struct nvkm_subdev *subdev = nv_subdev(obj); - u8 data = ioread8(subdev->mmio + addr); - nv_spam(subdev, "nv_rd08 0x%06x 0x%02x\n", addr, data); - return data; -} - -static inline u16 -nv_rd16(void *obj, u32 addr) -{ - struct nvkm_subdev *subdev = nv_subdev(obj); - u16 data = ioread16_native(subdev->mmio + addr); - nv_spam(subdev, "nv_rd16 0x%06x 0x%04x\n", addr, data); - return data; -} - -static inline u32 -nv_rd32(void *obj, u32 addr) -{ - struct nvkm_subdev *subdev = nv_subdev(obj); - u32 data = ioread32_native(subdev->mmio + addr); - nv_spam(subdev, "nv_rd32 0x%06x 0x%08x\n", addr, data); - return data; -} - -static inline void -nv_wr08(void *obj, u32 addr, u8 data) -{ - struct nvkm_subdev *subdev = nv_subdev(obj); - nv_spam(subdev, "nv_wr08 0x%06x 0x%02x\n", addr, data); - iowrite8(data, subdev->mmio + addr); -} - -static inline void -nv_wr16(void *obj, u32 addr, u16 data) -{ - struct nvkm_subdev *subdev = nv_subdev(obj); - nv_spam(subdev, "nv_wr16 0x%06x 0x%04x\n", addr, data); - iowrite16_native(data, subdev->mmio + addr); -} - -static inline void -nv_wr32(void *obj, u32 addr, u32 data) -{ - struct nvkm_subdev *subdev = nv_subdev(obj); - nv_spam(subdev, "nv_wr32 0x%06x 0x%08x\n", addr, data); - iowrite32_native(data, subdev->mmio + addr); -} - -static inline u32 -nv_mask(void *obj, u32 addr, u32 mask, u32 data) -{ - u32 temp = nv_rd32(obj, addr); - nv_wr32(obj, addr, (temp & ~mask) | data); - return temp; -} - #include <core/engine.h> #endif diff --git a/drivers/gpu/drm/nouveau/nvkm/core/subdev.c b/drivers/gpu/drm/nouveau/nvkm/core/subdev.c index fd1a94c..dd2cf44 100644 --- a/drivers/gpu/drm/nouveau/nvkm/core/subdev.c +++ b/drivers/gpu/drm/nouveau/nvkm/core/subdev.c @@ -115,7 +115,6 @@ nvkm_subdev_create_(struct nvkm_object *parent, struct nvkm_object *engine, if (parent) { struct nvkm_device *device = nv_device(parent); subdev->debug = nvkm_dbgopt(device->dbgopt, subname); - subdev->mmio = nv_subdev(device)->mmio; subdev->device = device; } else { subdev->device = nv_device(subdev); diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/device/base.c b/drivers/gpu/drm/nouveau/nvkm/engine/device/base.c index 3504743..bced8ea 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/device/base.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/device/base.c @@ -444,10 +444,9 @@ nvkm_devobj_ctor(struct nvkm_object *parent, struct nvkm_object *engine, device->oclass[NVDEV_SUBDEV_VBIOS] = &nvkm_bios_oclass; } - if (!(args->v0.disable & NV_DEVICE_V0_DISABLE_MMIO) && - !nv_subdev(device)->mmio) { - nv_subdev(device)->mmio = ioremap(mmio_base, mmio_size); - if (!nv_subdev(device)->mmio) { + if (!(args->v0.disable & NV_DEVICE_V0_DISABLE_MMIO) && !device->pri) { + device->pri = ioremap(mmio_base, mmio_size); + if (!device->pri) { nv_error(device, "unable to map device registers\n"); return -ENOMEM; } @@ -684,8 +683,8 @@ nvkm_device_dtor(struct nvkm_object *object) list_del(&device->head); mutex_unlock(&nv_devices_mutex); - if (nv_subdev(device)->mmio) - iounmap(nv_subdev(device)->mmio); + if (device->pri) + iounmap(device->pri); nvkm_engine_destroy(&device->engine); } |