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authorStefan Agner <stefan@agner.ch>2016-02-08 20:50:13 (GMT)
committerStefan Agner <stefan@agner.ch>2016-05-05 17:09:06 (GMT)
commit2c80661d2ea9bac9bc7ba519097745829add1871 (patch)
treeed9ac6fc008fdf8517b240c09d4b2e6ee11d3a12 /drivers/gpu/drm/panel
parentf0aa08387b92e432166d7143993da2635c8821e8 (diff)
downloadlinux-2c80661d2ea9bac9bc7ba519097745829add1871.tar.xz
drm/fsl-dcu: use bus_flags for pixel clock polarity
The drivers current default configuration drives the pixel data on rising edge of the pixel clock. However, most display sample data on rising edge... This leads to color shift artefacts visible especially at edges. This patch changes the relevant defines to be useful and actually set the bits, and changes pixel clock polarity to drive the pixel data on falling edge by default. The patch also adds an explicit pixel clock polarity flag to the display introduced with the driver (NEC WQVGA "nec,nl4827hc19-05b") using the new bus_flags field to retain the initial behavior. Signed-off-by: Stefan Agner <stefan@agner.ch>
Diffstat (limited to 'drivers/gpu/drm/panel')
-rw-r--r--drivers/gpu/drm/panel/panel-simple.c3
1 files changed, 2 insertions, 1 deletions
diff --git a/drivers/gpu/drm/panel/panel-simple.c b/drivers/gpu/drm/panel/panel-simple.c
index 77ae07f..b19c88f 100644
--- a/drivers/gpu/drm/panel/panel-simple.c
+++ b/drivers/gpu/drm/panel/panel-simple.c
@@ -1053,7 +1053,8 @@ static const struct panel_desc nec_nl4827hc19_05b = {
.width = 95,
.height = 54,
},
- .bus_format = MEDIA_BUS_FMT_RGB888_1X24
+ .bus_format = MEDIA_BUS_FMT_RGB888_1X24,
+ .bus_flags = DRM_BUS_FLAG_PIXDATA_POSEDGE,
};
static const struct display_timing okaya_rs800480t_7x0gp_timing = {