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| author | Christian König <christian.koenig@amd.com> | 2014-08-26 12:45:54 (GMT) |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2014-08-26 16:20:38 (GMT) |
| commit | 054e01d681b457ab50bdf1f22c0f0d1ad03afd70 (patch) | |
| tree | bc43a50fe294caff637d3aef90dc4872904cb0dd /drivers/gpu/drm/radeon/radeon.h | |
| parent | a284e9d14e35b776807c3a40dd1ff1e05429d4a4 (diff) | |
| download | linux-054e01d681b457ab50bdf1f22c0f0d1ad03afd70.tar.xz | |
drm/radeon: save/restore the PD addr on suspend/resume
This fixes a problem with GPU resets and TLB flushes on SI/CIK.
Signed-off-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/radeon/radeon.h')
| -rw-r--r-- | drivers/gpu/drm/radeon/radeon.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/gpu/drm/radeon/radeon.h b/drivers/gpu/drm/radeon/radeon.h index b281886..5f05b4c 100644 --- a/drivers/gpu/drm/radeon/radeon.h +++ b/drivers/gpu/drm/radeon/radeon.h @@ -915,6 +915,8 @@ struct radeon_vm_manager { u64 vram_base_offset; /* is vm enabled? */ bool enabled; + /* for hw to save the PD addr on suspend/resume */ + uint32_t saved_table_addr[RADEON_NUM_VM]; }; /* |