diff options
| author | Jyri Sarha <jsarha@ti.com> | 2016-04-07 17:36:48 (GMT) |
|---|---|---|
| committer | Jyri Sarha <jsarha@ti.com> | 2016-08-08 20:04:50 (GMT) |
| commit | 149441134c4ae4ebff393ca113f0941842385a6b (patch) | |
| tree | d0ae346cf9c449e744f20afd9a562e10aee8f865 /drivers/gpu | |
| parent | 1abcdac8ed4cf2335f050d88b2fe8f343726ed41 (diff) | |
| download | linux-149441134c4ae4ebff393ca113f0941842385a6b.tar.xz | |
drm/tilcdc: Write to LCDC_END_OF_INT_IND_REG at the end of IRQ function
Reorder the IRQ function so that the write to LCDC_END_OF_INT_IND_REG
is done last. The write to LCDC_END_OF_INT_IND_REG indicates to LCDC
that the interrupt service routine has completed (see section
13.3.6.1.6 in AM335x TRM). This is needed if LCDC's ipgvmodirq module
is configured for pulse interrupts.
Signed-off-by: Jyri Sarha <jsarha@ti.com>
Diffstat (limited to 'drivers/gpu')
| -rw-r--r-- | drivers/gpu/drm/tilcdc/tilcdc_crtc.c | 15 |
1 files changed, 10 insertions, 5 deletions
diff --git a/drivers/gpu/drm/tilcdc/tilcdc_crtc.c b/drivers/gpu/drm/tilcdc/tilcdc_crtc.c index 45ce0ba..55b8472 100644 --- a/drivers/gpu/drm/tilcdc/tilcdc_crtc.c +++ b/drivers/gpu/drm/tilcdc/tilcdc_crtc.c @@ -725,12 +725,16 @@ irqreturn_t tilcdc_crtc_irq(struct drm_crtc *crtc) tilcdc_crtc->frame_intact = true; } + if (stat & LCDC_FIFO_UNDERFLOW) + dev_err_ratelimited(dev->dev, "%s(0x%08x): FIFO underfow", + __func__, stat); + + /* For revision 2 only */ if (priv->rev == 2) { if (stat & LCDC_FRAME_DONE) { tilcdc_crtc->frame_done = true; wake_up(&tilcdc_crtc->frame_done_wq); } - tilcdc_write(dev, LCDC_END_OF_INT_IND_REG, 0); if (stat & LCDC_SYNC_LOST) { dev_err_ratelimited(dev->dev, "%s(0x%08x): Sync lost", @@ -743,11 +747,12 @@ irqreturn_t tilcdc_crtc_irq(struct drm_crtc *crtc) LCDC_SYNC_LOST); } } - } - if (stat & LCDC_FIFO_UNDERFLOW) - dev_err_ratelimited(dev->dev, "%s(0x%08x): FIFO underfow", - __func__, stat); + /* Indicate to LCDC that the interrupt service routine has + * completed, see 13.3.6.1.6 in AM335x TRM. + */ + tilcdc_write(dev, LCDC_END_OF_INT_IND_REG, 0); + } return IRQ_HANDLED; } |