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author | Mathieu Poirier <mathieu.poirier@linaro.org> | 2016-02-18 00:51:45 (GMT) |
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committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2016-02-20 22:11:01 (GMT) |
commit | b3e94405941e6916d5e365454d74560c2bea47ca (patch) | |
tree | cdedc71b6cbc3cc336285cfa4e7086e9291322d0 /drivers/hwtracing/coresight/coresight-priv.h | |
parent | 61390593f72377c3a8f41ef998462e2d3985adac (diff) | |
download | linux-b3e94405941e6916d5e365454d74560c2bea47ca.tar.xz |
coresight: associating path with session rather than tracer
When using the Coresight framework from the sysFS interface a
tracer is always handling a single session and as such, a path
can be associated with a tracer. But when supporting multiple
session per tracer there is no guarantee that sessions will always
have the same path from source to sink.
This patch is removing the automatic association between path and
tracers. The building of a path and enablement of the components
in the path are decoupled, allowing for the association of a path
with a session rather than a tracer.
To keep backward functionality with the current sysFS access methods
a per-cpu place holder is used to keep a handle on the path built when
tracers are enabled. Lastly APIs to build paths and enable tracers are
made public so that other subsystem can interact with the Coresight
framework.
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'drivers/hwtracing/coresight/coresight-priv.h')
-rw-r--r-- | drivers/hwtracing/coresight/coresight-priv.h | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/drivers/hwtracing/coresight/coresight-priv.h b/drivers/hwtracing/coresight/coresight-priv.h index 62fcd98..7b193a3 100644 --- a/drivers/hwtracing/coresight/coresight-priv.h +++ b/drivers/hwtracing/coresight/coresight-priv.h @@ -52,6 +52,11 @@ static inline void CS_UNLOCK(void __iomem *addr) } while (0); } +void coresight_disable_path(struct list_head *path); +int coresight_enable_path(struct list_head *path); +struct list_head *coresight_build_path(struct coresight_device *csdev); +void coresight_release_path(struct list_head *path); + #ifdef CONFIG_CORESIGHT_SOURCE_ETM3X extern int etm_readl_cp14(u32 off, unsigned int *val); extern int etm_writel_cp14(u32 off, u32 val); |