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| author | Matt Ranostay <matt.ranostay@intel.com> | 2016-02-22 21:39:09 (GMT) |
|---|---|---|
| committer | Jonathan Cameron <jic23@kernel.org> | 2016-02-25 19:48:57 (GMT) |
| commit | 725f645d876f22b60a87fa6e718e13402ad4b871 (patch) | |
| tree | 31ee465bd01df14b7b16a8ba084fe118f5d86d00 /drivers/iio/imu | |
| parent | 8f356be3fe098385e7a79ce893114ddcf8ad7d78 (diff) | |
| download | linux-725f645d876f22b60a87fa6e718e13402ad4b871.tar.xz | |
iio: imu: mpu6050: add missing docstring for int_pin_cfg
Signed-off-by: Matt Ranostay <matt.ranostay@intel.com>
Signed-off-by: Jonathan Cameron <jic23@kernel.org>
Diffstat (limited to 'drivers/iio/imu')
| -rw-r--r-- | drivers/iio/imu/inv_mpu6050/inv_mpu_iio.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/iio/imu/inv_mpu6050/inv_mpu_iio.h b/drivers/iio/imu/inv_mpu6050/inv_mpu_iio.h index 243324d..a6c45ce 100644 --- a/drivers/iio/imu/inv_mpu6050/inv_mpu_iio.h +++ b/drivers/iio/imu/inv_mpu6050/inv_mpu_iio.h @@ -39,6 +39,7 @@ * @int_enable: Interrupt enable register. * @pwr_mgmt_1: Controls chip's power state and clock source. * @pwr_mgmt_2: Controls power state of individual sensors. + * @int_pin_cfg; Controls interrupt pin configuration. */ struct inv_mpu6050_reg_map { u8 sample_rate_div; |