diff options
| author | Daniel Jurgens <danielj@mellanox.com> | 2016-10-27 13:36:41 (GMT) |
|---|---|---|
| committer | Doug Ledford <dledford@redhat.com> | 2016-11-17 01:03:44 (GMT) |
| commit | 16b0e0695a73b68d8ca40288c8f9614ef208917b (patch) | |
| tree | 33cc55e4a4a7ac46c66cabfdf8be6379b60b39bd /drivers/infiniband/hw | |
| parent | efd7f40082a0dfd112eb87ff2124467a5739216f (diff) | |
| download | linux-16b0e0695a73b68d8ca40288c8f9614ef208917b.tar.xz | |
IB/mlx5: Use cache line size to select CQE stride
When creating kernel CQs use 128B CQE stride if the
cache line size is 128B, 64B otherwise. This prevents
multiple CQEs from residing in a 128B cache line,
which can cause retries when there are concurrent
read and writes in one cache line.
Tested with IPoIB on PPC64, saw ~5% throughput
improvement.
Fixes: e126ba97dba9 ('mlx5: Add driver for Mellanox Connect-IB adapters')
Signed-off-by: Daniel Jurgens <danielj@mellanox.com>
Signed-off-by: Maor Gottlieb <maorg@mellanox.com>
Signed-off-by: Leon Romanovsky <leon@kernel.org>
Signed-off-by: Doug Ledford <dledford@redhat.com>
Diffstat (limited to 'drivers/infiniband/hw')
| -rw-r--r-- | drivers/infiniband/hw/mlx5/cq.c | 3 |
1 files changed, 1 insertions, 2 deletions
diff --git a/drivers/infiniband/hw/mlx5/cq.c b/drivers/infiniband/hw/mlx5/cq.c index 79d017b..fcd04b8 100644 --- a/drivers/infiniband/hw/mlx5/cq.c +++ b/drivers/infiniband/hw/mlx5/cq.c @@ -932,8 +932,7 @@ struct ib_cq *mlx5_ib_create_cq(struct ib_device *ibdev, if (err) goto err_create; } else { - /* for now choose 64 bytes till we have a proper interface */ - cqe_size = 64; + cqe_size = cache_line_size() == 128 ? 128 : 64; err = create_cq_kernel(dev, cq, entries, cqe_size, &cqb, &index, &inlen); if (err) |