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author | David Woodhouse <David.Woodhouse@intel.com> | 2015-10-12 13:17:37 (GMT) |
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committer | David Woodhouse <David.Woodhouse@intel.com> | 2015-10-15 11:05:39 (GMT) |
commit | b16d0cb9e2fc5c311948c660dd6f4b59a9ccd333 (patch) | |
tree | 1f63f7efe5e6607d30372c90aac2275ae8689f9a /drivers/iommu/Kconfig | |
parent | 8a94ade4ce6df22006b96c5c9a8d6d12fce67585 (diff) | |
download | linux-b16d0cb9e2fc5c311948c660dd6f4b59a9ccd333.tar.xz |
iommu/vt-d: Always enable PASID/PRI PCI capabilities before ATS
The behaviour if you enable PASID support after ATS is undefined. So we
have to enable it first, even if we don't know whether we'll need it.
This is safe enough; unless we set up a context that permits it, the device
can't actually *do* anything with it.
Also shift the feature detction to dmar_insert_one_dev_info() as it only
needs to happen once.
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
Diffstat (limited to 'drivers/iommu/Kconfig')
-rw-r--r-- | drivers/iommu/Kconfig | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/iommu/Kconfig b/drivers/iommu/Kconfig index e3b2c2e..8d23f5e 100644 --- a/drivers/iommu/Kconfig +++ b/drivers/iommu/Kconfig @@ -138,6 +138,7 @@ config INTEL_IOMMU config INTEL_IOMMU_SVM bool "Support for Shared Virtual Memory with Intel IOMMU" depends on INTEL_IOMMU && X86 + select PCI_PASID help Shared Virtual Memory (SVM) provides a facility for devices to access DMA resources through process address space by |