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authorSuravee Suthikulpanit <suravee.suthikulpanit@amd.com>2013-03-27 23:51:52 (GMT)
committerJoerg Roedel <joro@8bytes.org>2013-04-02 14:48:20 (GMT)
commit925fe08bce38d1ff052fe2209b9e2b8d5fbb7f98 (patch)
tree603e1fa952b9a839ec20a8aab04246c843a5bd5b /drivers/iommu/amd_iommu_types.h
parent07961ac7c0ee8b546658717034fe692fd12eefa9 (diff)
downloadlinux-925fe08bce38d1ff052fe2209b9e2b8d5fbb7f98.tar.xz
iommu/amd: Re-enable IOMMU event log interrupt after handling.
Current driver does not clear the IOMMU event log interrupt bit in the IOMMU status register after processing an interrupt. This causes the IOMMU hardware to generate event log interrupt only once. This has been observed in both IOMMU v1 and V2 hardware. This patch clears the bit by writing 1 to bit 1 of the IOMMU status register (MMIO Offset 2020h) Signed-off-by: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com> Signed-off-by: Joerg Roedel <joro@8bytes.org>
Diffstat (limited to 'drivers/iommu/amd_iommu_types.h')
-rw-r--r--drivers/iommu/amd_iommu_types.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/iommu/amd_iommu_types.h b/drivers/iommu/amd_iommu_types.h
index e38ab43..083f98c 100644
--- a/drivers/iommu/amd_iommu_types.h
+++ b/drivers/iommu/amd_iommu_types.h
@@ -99,6 +99,7 @@
#define PASID_MASK 0x000fffff
/* MMIO status bits */
+#define MMIO_STATUS_EVT_INT_MASK (1 << 1)
#define MMIO_STATUS_COM_WAIT_INT_MASK (1 << 2)
#define MMIO_STATUS_PPR_INT_MASK (1 << 6)