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| author | Gary Bisson <gary.bisson@boundarydevices.com> | 2015-06-10 16:44:23 (GMT) |
|---|---|---|
| committer | Thierry Reding <treding@nvidia.com> | 2015-08-14 19:35:35 (GMT) |
| commit | a99fb6269d1af432c051ed552aaea807f9f906c9 (patch) | |
| tree | d99c086801ab5547afcc49b214053d0950c7573e /drivers/mfd/intel_soc_pmic_core.h | |
| parent | 58c948d8c4145d354457bdfd654b828007722c44 (diff) | |
| download | linux-a99fb6269d1af432c051ed552aaea807f9f906c9.tar.xz | |
drm/panel: Add display timing for Okaya RS800480T-7X0GP
Add support for the Okaya RS800480T-7X0GP to the DRM simple panel
driver.
The RS800480T-7X0GP is a WVGA (800x480) panel with an 18-bit parallel
LCD interface. It supports pixel clocks in the range of 30-40 MHz.
This panel details can be found at:
http://boundarydevices.com/product/7-800x480-display/
Signed-off-by: Gary Bisson <gary.bisson@boundarydevices.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'drivers/mfd/intel_soc_pmic_core.h')
0 files changed, 0 insertions, 0 deletions