diff options
author | Jeff Kirsher <jeffrey.t.kirsher@intel.com> | 2011-03-30 14:46:36 (GMT) |
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committer | Jeff Kirsher <jeffrey.t.kirsher@intel.com> | 2011-08-11 02:54:11 (GMT) |
commit | b955f6ca776f3bab3d1e2c5fb1d247b203cbda14 (patch) | |
tree | 88e47fa3369f95c5673d4d654ae5f432cdc79048 /drivers/net/ethernet/amd/au1000_eth.h | |
parent | ca7a8e85262e93065b2a49dfb96a24d4a534a049 (diff) | |
download | linux-b955f6ca776f3bab3d1e2c5fb1d247b203cbda14.tar.xz |
amd: Move AMD (Lance) chipset drivers
Moves the drivers for the AMD chipsets into drivers/net/ethernet/amd/
and the necessary Kconfig and Makfile changes.
The au1000 (Alchemy) driver was also moved into the same directory
even though it is not a "Lance" driver.
CC: Peter Maydell <pmaydell@chiark.greenend.org.uk>
CC: Roman Hodek <Roman.Hodek@informatik.uni-erlangen.de>
CC: "Maciej W. Rozycki" <macro@linux-mips.org>
CC: Donald Becker <becker@scyld.com>
CC: Sam Creasey <sammy@users.qual.net>
CC: Miguel de Icaza <miguel@nuclecu.unam.mx>
CC: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
CC: Don Fry <pcnet32@frontier.com>
CC: Geert Uytterhoeven <geert@linux-m68k.org>
CC: Russell King <linux@arm.linux.org.uk>
CC: David Davies <davies@maniac.ultranet.com>
CC: "M.Hipp" <hippm@informatik.uni-tuebingen.de>
CC: Pete Popov <ppopov@embeddedalley.com>
CC: David Hinds <dahinds@users.sourceforge.net>
CC: "Roger C. Pao" <rpao@paonet.org>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
Diffstat (limited to 'drivers/net/ethernet/amd/au1000_eth.h')
-rw-r--r-- | drivers/net/ethernet/amd/au1000_eth.h | 134 |
1 files changed, 134 insertions, 0 deletions
diff --git a/drivers/net/ethernet/amd/au1000_eth.h b/drivers/net/ethernet/amd/au1000_eth.h new file mode 100644 index 0000000..6229c77 --- /dev/null +++ b/drivers/net/ethernet/amd/au1000_eth.h @@ -0,0 +1,134 @@ +/* + * + * Alchemy Au1x00 ethernet driver include file + * + * Author: Pete Popov <ppopov@mvista.com> + * + * Copyright 2001 MontaVista Software Inc. + * + * ######################################################################## + * + * This program is free software; you can distribute it and/or modify it + * under the terms of the GNU General Public License (Version 2) as + * published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License + * for more details. + * + * You should have received a copy of the GNU General Public License along + * with this program; if not, write to the Free Software Foundation, Inc., + * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA. + * + * ######################################################################## + * + * + */ + + +#define MAC_IOSIZE 0x10000 +#define NUM_RX_DMA 4 /* Au1x00 has 4 rx hardware descriptors */ +#define NUM_TX_DMA 4 /* Au1x00 has 4 tx hardware descriptors */ + +#define NUM_RX_BUFFS 4 +#define NUM_TX_BUFFS 4 +#define MAX_BUF_SIZE 2048 + +#define ETH_TX_TIMEOUT (HZ/4) +#define MAC_MIN_PKT_SIZE 64 + +#define MULTICAST_FILTER_LIMIT 64 + +/* + * Data Buffer Descriptor. Data buffers must be aligned on 32 byte + * boundary for both, receive and transmit. + */ +struct db_dest { + struct db_dest *pnext; + u32 *vaddr; + dma_addr_t dma_addr; +}; + +/* + * The transmit and receive descriptors are memory + * mapped registers. + */ +struct tx_dma { + u32 status; + u32 buff_stat; + u32 len; + u32 pad; +}; + +struct rx_dma { + u32 status; + u32 buff_stat; + u32 pad[2]; +}; + + +/* + * MAC control registers, memory mapped. + */ +struct mac_reg { + u32 control; + u32 mac_addr_high; + u32 mac_addr_low; + u32 multi_hash_high; + u32 multi_hash_low; + u32 mii_control; + u32 mii_data; + u32 flow_control; + u32 vlan1_tag; + u32 vlan2_tag; +}; + + +struct au1000_private { + struct db_dest *pDBfree; + struct db_dest db[NUM_RX_BUFFS+NUM_TX_BUFFS]; + struct rx_dma *rx_dma_ring[NUM_RX_DMA]; + struct tx_dma *tx_dma_ring[NUM_TX_DMA]; + struct db_dest *rx_db_inuse[NUM_RX_DMA]; + struct db_dest *tx_db_inuse[NUM_TX_DMA]; + u32 rx_head; + u32 tx_head; + u32 tx_tail; + u32 tx_full; + + int mac_id; + + int mac_enabled; /* whether MAC is currently enabled and running + * (req. for mdio) + */ + + int old_link; /* used by au1000_adjust_link */ + int old_speed; + int old_duplex; + + struct phy_device *phy_dev; + struct mii_bus *mii_bus; + + /* PHY configuration */ + int phy_static_config; + int phy_search_highest_addr; + int phy1_search_mac0; + + int phy_addr; + int phy_busid; + int phy_irq; + + /* These variables are just for quick access + * to certain regs addresses. + */ + struct mac_reg *mac; /* mac registers */ + u32 *enable; /* address of MAC Enable Register */ + + u32 vaddr; /* virtual address of rx/tx buffers */ + dma_addr_t dma_addr; /* dma address of rx/tx buffers */ + + spinlock_t lock; /* Serialise access to device */ + + u32 msg_enable; +}; |